[llvm] bb65e5b - [X86] Add base SSE2 i686 test coverage to vector bitlogic reduction tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 6 02:56:25 PDT 2023
Author: Simon Pilgrim
Date: 2023-07-06T10:56:07+01:00
New Revision: bb65e5b88119eb5f9b744f12040c0972449b3c5a
URL: https://github.com/llvm/llvm-project/commit/bb65e5b88119eb5f9b744f12040c0972449b3c5a
DIFF: https://github.com/llvm/llvm-project/commit/bb65e5b88119eb5f9b744f12040c0972449b3c5a.diff
LOG: [X86] Add base SSE2 i686 test coverage to vector bitlogic reduction tests
Added:
Modified:
llvm/test/CodeGen/X86/vector-reduce-and.ll
llvm/test/CodeGen/X86/vector-reduce-or.ll
llvm/test/CodeGen/X86/vector-reduce-xor.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-reduce-and.ll b/llvm/test/CodeGen/X86/vector-reduce-and.ll
index b85696aad33533..df6e0797855685 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-and.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-and.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
@@ -10,13 +11,22 @@
; vXi64
;
-define i64 @test_v2i64(<2 x i64> %a0) {
-; SSE-LABEL: test_v2i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v2i64(<2 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v2i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v2i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX-LABEL: test_v2i64:
; AVX: # %bb.0:
@@ -28,14 +38,24 @@ define i64 @test_v2i64(<2 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v4i64(<4 x i64> %a0) {
-; SSE-LABEL: test_v4i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v4i64(<4 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v4i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v4i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v4i64:
; AVX1: # %bb.0:
@@ -70,16 +90,34 @@ define i64 @test_v4i64(<4 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v8i64(<8 x i64> %a0) {
-; SSE-LABEL: test_v8i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v8i64(<8 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v8i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 8(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v8i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v8i64:
; AVX1: # %bb.0:
@@ -118,20 +156,43 @@ define i64 @test_v8i64(<8 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v16i64(<16 x i64> %a0) {
-; SSE-LABEL: test_v16i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm6, %xmm2
-; SSE-NEXT: pand %xmm4, %xmm0
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm7, %xmm3
-; SSE-NEXT: pand %xmm5, %xmm1
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movq %xmm0, %rax
-; SSE-NEXT: retq
+define i64 @test_v16i64(<16 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pand 56(%ebp), %xmm2
+; X86-SSE-NEXT: pand 24(%ebp), %xmm0
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 72(%ebp), %xmm3
+; X86-SSE-NEXT: pand 40(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm3, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm6, %xmm2
+; X64-SSE-NEXT: pand %xmm4, %xmm0
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm7, %xmm3
+; X64-SSE-NEXT: pand %xmm5, %xmm1
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movq %xmm0, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i64:
; AVX1: # %bb.0:
@@ -179,13 +240,13 @@ define i64 @test_v16i64(<16 x i64> %a0) {
; vXi32
;
-define i32 @test_v2i32(<2 x i32> %a0) {
+define i32 @test_v2i32(<2 x i32> %a0) nounwind {
; SSE-LABEL: test_v2i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i32:
; AVX: # %bb.0:
@@ -197,7 +258,7 @@ define i32 @test_v2i32(<2 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v4i32(<4 x i32> %a0) {
+define i32 @test_v4i32(<4 x i32> %a0) nounwind {
; SSE-LABEL: test_v4i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -205,7 +266,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i32:
; AVX: # %bb.0:
@@ -219,7 +280,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v8i32(<8 x i32> %a0) {
+define i32 @test_v8i32(<8 x i32> %a0) nounwind {
; SSE-LABEL: test_v8i32:
; SSE: # %bb.0:
; SSE-NEXT: pand %xmm1, %xmm0
@@ -228,7 +289,7 @@ define i32 @test_v8i32(<8 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v8i32:
; AVX1: # %bb.0:
@@ -269,18 +330,36 @@ define i32 @test_v8i32(<8 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v16i32(<16 x i32> %a0) {
-; SSE-LABEL: test_v16i32:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+define i32 @test_v16i32(<16 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 8(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i32:
; AVX1: # %bb.0:
@@ -325,22 +404,45 @@ define i32 @test_v16i32(<16 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v32i32(<32 x i32> %a0) {
-; SSE-LABEL: test_v32i32:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm6, %xmm2
-; SSE-NEXT: pand %xmm4, %xmm0
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm7, %xmm3
-; SSE-NEXT: pand %xmm5, %xmm1
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+define i32 @test_v32i32(<32 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pand 56(%ebp), %xmm2
+; X86-SSE-NEXT: pand 24(%ebp), %xmm0
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 72(%ebp), %xmm3
+; X86-SSE-NEXT: pand 40(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm3, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm6, %xmm2
+; X64-SSE-NEXT: pand %xmm4, %xmm0
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm7, %xmm3
+; X64-SSE-NEXT: pand %xmm5, %xmm1
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i32:
; AVX1: # %bb.0:
@@ -394,7 +496,7 @@ define i32 @test_v32i32(<32 x i32> %a0) {
; vXi16
;
-define i16 @test_v2i16(<2 x i16> %a0) {
+define i16 @test_v2i16(<2 x i16> %a0) nounwind {
; SSE-LABEL: test_v2i16:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -402,7 +504,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i16:
; AVX: # %bb.0:
@@ -415,7 +517,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v4i16(<4 x i16> %a0) {
+define i16 @test_v4i16(<4 x i16> %a0) nounwind {
; SSE-LABEL: test_v4i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -425,7 +527,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i16:
; AVX: # %bb.0:
@@ -440,7 +542,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v8i16(<8 x i16> %a0) {
+define i16 @test_v8i16(<8 x i16> %a0) nounwind {
; SSE-LABEL: test_v8i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -452,7 +554,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i16:
; AVX: # %bb.0:
@@ -469,7 +571,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v16i16(<16 x i16> %a0) {
+define i16 @test_v16i16(<16 x i16> %a0) nounwind {
; SSE-LABEL: test_v16i16:
; SSE: # %bb.0:
; SSE-NEXT: pand %xmm1, %xmm0
@@ -482,7 +584,7 @@ define i16 @test_v16i16(<16 x i16> %a0) {
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v16i16:
; AVX1: # %bb.0:
@@ -532,22 +634,44 @@ define i16 @test_v16i16(<16 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v32i16(<32 x i16> %a0) {
-; SSE-LABEL: test_v32i16:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v32i16(<32 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 8(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i16:
; AVX1: # %bb.0:
@@ -601,26 +725,53 @@ define i16 @test_v32i16(<32 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v64i16(<64 x i16> %a0) {
-; SSE-LABEL: test_v64i16:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm6, %xmm2
-; SSE-NEXT: pand %xmm4, %xmm0
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm7, %xmm3
-; SSE-NEXT: pand %xmm5, %xmm1
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v64i16(<64 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pand 56(%ebp), %xmm2
+; X86-SSE-NEXT: pand 24(%ebp), %xmm0
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 72(%ebp), %xmm3
+; X86-SSE-NEXT: pand 40(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm3, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm6, %xmm2
+; X64-SSE-NEXT: pand %xmm4, %xmm0
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm7, %xmm3
+; X64-SSE-NEXT: pand %xmm5, %xmm1
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i16:
; AVX1: # %bb.0:
@@ -683,7 +834,7 @@ define i16 @test_v64i16(<64 x i16> %a0) {
; vXi8
;
-define i8 @test_v2i8(<2 x i8> %a0) {
+define i8 @test_v2i8(<2 x i8> %a0) nounwind {
; SSE-LABEL: test_v2i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -691,7 +842,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i8:
; AVX: # %bb.0:
@@ -704,7 +855,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v4i8(<4 x i8> %a0) {
+define i8 @test_v4i8(<4 x i8> %a0) nounwind {
; SSE-LABEL: test_v4i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -715,7 +866,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i8:
; AVX: # %bb.0:
@@ -730,7 +881,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v8i8(<8 x i8> %a0) {
+define i8 @test_v8i8(<8 x i8> %a0) nounwind {
; SSE-LABEL: test_v8i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -743,7 +894,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i8:
; AVX: # %bb.0:
@@ -760,7 +911,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v16i8(<16 x i8> %a0) {
+define i8 @test_v16i8(<16 x i8> %a0) nounwind {
; SSE-LABEL: test_v16i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -775,7 +926,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v16i8:
; AVX: # %bb.0:
@@ -794,7 +945,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v32i8(<32 x i8> %a0) {
+define i8 @test_v32i8(<32 x i8> %a0) nounwind {
; SSE-LABEL: test_v32i8:
; SSE: # %bb.0:
; SSE-NEXT: pand %xmm1, %xmm0
@@ -810,7 +961,7 @@ define i8 @test_v32i8(<32 x i8> %a0) {
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v32i8:
; AVX1: # %bb.0:
@@ -866,25 +1017,50 @@ define i8 @test_v32i8(<32 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v64i8(<64 x i8> %a0) {
-; SSE-LABEL: test_v64i8:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrlw $8, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v64i8(<64 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 8(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrlw $8, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i8:
; AVX1: # %bb.0:
@@ -944,29 +1120,59 @@ define i8 @test_v64i8(<64 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v128i8(<128 x i8> %a0) {
-; SSE-LABEL: test_v128i8:
-; SSE: # %bb.0:
-; SSE-NEXT: pand %xmm6, %xmm2
-; SSE-NEXT: pand %xmm4, %xmm0
-; SSE-NEXT: pand %xmm2, %xmm0
-; SSE-NEXT: pand %xmm7, %xmm3
-; SSE-NEXT: pand %xmm5, %xmm1
-; SSE-NEXT: pand %xmm3, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: pand %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrlw $8, %xmm1
-; SSE-NEXT: pand %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v128i8(<128 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v128i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pand 56(%ebp), %xmm2
+; X86-SSE-NEXT: pand 24(%ebp), %xmm0
+; X86-SSE-NEXT: pand %xmm2, %xmm0
+; X86-SSE-NEXT: pand 72(%ebp), %xmm3
+; X86-SSE-NEXT: pand 40(%ebp), %xmm1
+; X86-SSE-NEXT: pand %xmm3, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pand %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: pand %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v128i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pand %xmm6, %xmm2
+; X64-SSE-NEXT: pand %xmm4, %xmm0
+; X64-SSE-NEXT: pand %xmm2, %xmm0
+; X64-SSE-NEXT: pand %xmm7, %xmm3
+; X64-SSE-NEXT: pand %xmm5, %xmm1
+; X64-SSE-NEXT: pand %xmm3, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: pand %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrlw $8, %xmm1
+; X64-SSE-NEXT: pand %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v128i8:
; AVX1: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vector-reduce-or.ll b/llvm/test/CodeGen/X86/vector-reduce-or.ll
index 076392a41b884c..3c960f255046c5 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
@@ -10,13 +11,22 @@
; vXi64
;
-define i64 @test_v2i64(<2 x i64> %a0) {
-; SSE-LABEL: test_v2i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v2i64(<2 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v2i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v2i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX-LABEL: test_v2i64:
; AVX: # %bb.0:
@@ -28,14 +38,24 @@ define i64 @test_v2i64(<2 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v4i64(<4 x i64> %a0) {
-; SSE-LABEL: test_v4i64:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v4i64(<4 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v4i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v4i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v4i64:
; AVX1: # %bb.0:
@@ -70,16 +90,34 @@ define i64 @test_v4i64(<4 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v8i64(<8 x i64> %a0) {
-; SSE-LABEL: test_v8i64:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v8i64(<8 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v8i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 8(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v8i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v8i64:
; AVX1: # %bb.0:
@@ -118,20 +156,43 @@ define i64 @test_v8i64(<8 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v16i64(<16 x i64> %a0) {
-; SSE-LABEL: test_v16i64:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm6, %xmm2
-; SSE-NEXT: por %xmm4, %xmm0
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm7, %xmm3
-; SSE-NEXT: por %xmm5, %xmm1
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movq %xmm0, %rax
-; SSE-NEXT: retq
+define i64 @test_v16i64(<16 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: por 56(%ebp), %xmm2
+; X86-SSE-NEXT: por 24(%ebp), %xmm0
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 72(%ebp), %xmm3
+; X86-SSE-NEXT: por 40(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm3, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm6, %xmm2
+; X64-SSE-NEXT: por %xmm4, %xmm0
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm7, %xmm3
+; X64-SSE-NEXT: por %xmm5, %xmm1
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movq %xmm0, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i64:
; AVX1: # %bb.0:
@@ -179,13 +240,13 @@ define i64 @test_v16i64(<16 x i64> %a0) {
; vXi32
;
-define i32 @test_v2i32(<2 x i32> %a0) {
+define i32 @test_v2i32(<2 x i32> %a0) nounwind {
; SSE-LABEL: test_v2i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i32:
; AVX: # %bb.0:
@@ -197,7 +258,7 @@ define i32 @test_v2i32(<2 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v4i32(<4 x i32> %a0) {
+define i32 @test_v4i32(<4 x i32> %a0) nounwind {
; SSE-LABEL: test_v4i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -205,7 +266,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i32:
; AVX: # %bb.0:
@@ -219,7 +280,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v8i32(<8 x i32> %a0) {
+define i32 @test_v8i32(<8 x i32> %a0) nounwind {
; SSE-LABEL: test_v8i32:
; SSE: # %bb.0:
; SSE-NEXT: por %xmm1, %xmm0
@@ -228,7 +289,7 @@ define i32 @test_v8i32(<8 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v8i32:
; AVX1: # %bb.0:
@@ -269,18 +330,36 @@ define i32 @test_v8i32(<8 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v16i32(<16 x i32> %a0) {
-; SSE-LABEL: test_v16i32:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+define i32 @test_v16i32(<16 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 8(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i32:
; AVX1: # %bb.0:
@@ -325,22 +404,45 @@ define i32 @test_v16i32(<16 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v32i32(<32 x i32> %a0) {
-; SSE-LABEL: test_v32i32:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm6, %xmm2
-; SSE-NEXT: por %xmm4, %xmm0
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm7, %xmm3
-; SSE-NEXT: por %xmm5, %xmm1
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+define i32 @test_v32i32(<32 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: por 56(%ebp), %xmm2
+; X86-SSE-NEXT: por 24(%ebp), %xmm0
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 72(%ebp), %xmm3
+; X86-SSE-NEXT: por 40(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm3, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm6, %xmm2
+; X64-SSE-NEXT: por %xmm4, %xmm0
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm7, %xmm3
+; X64-SSE-NEXT: por %xmm5, %xmm1
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i32:
; AVX1: # %bb.0:
@@ -394,7 +496,7 @@ define i32 @test_v32i32(<32 x i32> %a0) {
; vXi16
;
-define i16 @test_v2i16(<2 x i16> %a0) {
+define i16 @test_v2i16(<2 x i16> %a0) nounwind {
; SSE-LABEL: test_v2i16:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -402,7 +504,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i16:
; AVX: # %bb.0:
@@ -415,7 +517,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v4i16(<4 x i16> %a0) {
+define i16 @test_v4i16(<4 x i16> %a0) nounwind {
; SSE-LABEL: test_v4i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -425,7 +527,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i16:
; AVX: # %bb.0:
@@ -440,7 +542,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v8i16(<8 x i16> %a0) {
+define i16 @test_v8i16(<8 x i16> %a0) nounwind {
; SSE-LABEL: test_v8i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -452,7 +554,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i16:
; AVX: # %bb.0:
@@ -469,7 +571,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v16i16(<16 x i16> %a0) {
+define i16 @test_v16i16(<16 x i16> %a0) nounwind {
; SSE-LABEL: test_v16i16:
; SSE: # %bb.0:
; SSE-NEXT: por %xmm1, %xmm0
@@ -482,7 +584,7 @@ define i16 @test_v16i16(<16 x i16> %a0) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v16i16:
; AVX1: # %bb.0:
@@ -532,22 +634,44 @@ define i16 @test_v16i16(<16 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v32i16(<32 x i16> %a0) {
-; SSE-LABEL: test_v32i16:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v32i16(<32 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 8(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i16:
; AVX1: # %bb.0:
@@ -601,26 +725,53 @@ define i16 @test_v32i16(<32 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v64i16(<64 x i16> %a0) {
-; SSE-LABEL: test_v64i16:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm6, %xmm2
-; SSE-NEXT: por %xmm4, %xmm0
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm7, %xmm3
-; SSE-NEXT: por %xmm5, %xmm1
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v64i16(<64 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: por 56(%ebp), %xmm2
+; X86-SSE-NEXT: por 24(%ebp), %xmm0
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 72(%ebp), %xmm3
+; X86-SSE-NEXT: por 40(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm3, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm6, %xmm2
+; X64-SSE-NEXT: por %xmm4, %xmm0
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm7, %xmm3
+; X64-SSE-NEXT: por %xmm5, %xmm1
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i16:
; AVX1: # %bb.0:
@@ -683,7 +834,7 @@ define i16 @test_v64i16(<64 x i16> %a0) {
; vXi8
;
-define i8 @test_v2i8(<2 x i8> %a0) {
+define i8 @test_v2i8(<2 x i8> %a0) nounwind {
; SSE-LABEL: test_v2i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -691,7 +842,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i8:
; AVX: # %bb.0:
@@ -704,7 +855,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v4i8(<4 x i8> %a0) {
+define i8 @test_v4i8(<4 x i8> %a0) nounwind {
; SSE-LABEL: test_v4i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -715,7 +866,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i8:
; AVX: # %bb.0:
@@ -730,7 +881,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v8i8(<8 x i8> %a0) {
+define i8 @test_v8i8(<8 x i8> %a0) nounwind {
; SSE-LABEL: test_v8i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -743,7 +894,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i8:
; AVX: # %bb.0:
@@ -760,7 +911,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v16i8(<16 x i8> %a0) {
+define i8 @test_v16i8(<16 x i8> %a0) nounwind {
; SSE-LABEL: test_v16i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -775,7 +926,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v16i8:
; AVX: # %bb.0:
@@ -794,7 +945,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v32i8(<32 x i8> %a0) {
+define i8 @test_v32i8(<32 x i8> %a0) nounwind {
; SSE-LABEL: test_v32i8:
; SSE: # %bb.0:
; SSE-NEXT: por %xmm1, %xmm0
@@ -810,7 +961,7 @@ define i8 @test_v32i8(<32 x i8> %a0) {
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v32i8:
; AVX1: # %bb.0:
@@ -866,25 +1017,50 @@ define i8 @test_v32i8(<32 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v64i8(<64 x i8> %a0) {
-; SSE-LABEL: test_v64i8:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrlw $8, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v64i8(<64 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 8(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrlw $8, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i8:
; AVX1: # %bb.0:
@@ -944,29 +1120,59 @@ define i8 @test_v64i8(<64 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v128i8(<128 x i8> %a0) {
-; SSE-LABEL: test_v128i8:
-; SSE: # %bb.0:
-; SSE-NEXT: por %xmm6, %xmm2
-; SSE-NEXT: por %xmm4, %xmm0
-; SSE-NEXT: por %xmm2, %xmm0
-; SSE-NEXT: por %xmm7, %xmm3
-; SSE-NEXT: por %xmm5, %xmm1
-; SSE-NEXT: por %xmm3, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: por %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrlw $8, %xmm1
-; SSE-NEXT: por %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v128i8(<128 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v128i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: por 56(%ebp), %xmm2
+; X86-SSE-NEXT: por 24(%ebp), %xmm0
+; X86-SSE-NEXT: por %xmm2, %xmm0
+; X86-SSE-NEXT: por 72(%ebp), %xmm3
+; X86-SSE-NEXT: por 40(%ebp), %xmm1
+; X86-SSE-NEXT: por %xmm3, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: por %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: por %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v128i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: por %xmm6, %xmm2
+; X64-SSE-NEXT: por %xmm4, %xmm0
+; X64-SSE-NEXT: por %xmm2, %xmm0
+; X64-SSE-NEXT: por %xmm7, %xmm3
+; X64-SSE-NEXT: por %xmm5, %xmm1
+; X64-SSE-NEXT: por %xmm3, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: por %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrlw $8, %xmm1
+; X64-SSE-NEXT: por %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v128i8:
; AVX1: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vector-reduce-xor.ll b/llvm/test/CodeGen/X86/vector-reduce-xor.ll
index 737c992dd62704..33199388fd6fcd 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-xor.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-xor.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
@@ -10,13 +11,22 @@
; vXi64
;
-define i64 @test_v2i64(<2 x i64> %a0) {
-; SSE-LABEL: test_v2i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v2i64(<2 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v2i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v2i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX-LABEL: test_v2i64:
; AVX: # %bb.0:
@@ -28,14 +38,24 @@ define i64 @test_v2i64(<2 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v4i64(<4 x i64> %a0) {
-; SSE-LABEL: test_v4i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v4i64(<4 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v4i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v4i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v4i64:
; AVX1: # %bb.0:
@@ -70,16 +90,34 @@ define i64 @test_v4i64(<4 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v8i64(<8 x i64> %a0) {
-; SSE-LABEL: test_v8i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movq %xmm1, %rax
-; SSE-NEXT: retq
+define i64 @test_v8i64(<8 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v8i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 8(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v8i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movq %xmm1, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v8i64:
; AVX1: # %bb.0:
@@ -118,20 +156,43 @@ define i64 @test_v8i64(<8 x i64> %a0) {
ret i64 %1
}
-define i64 @test_v16i64(<16 x i64> %a0) {
-; SSE-LABEL: test_v16i64:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm6, %xmm2
-; SSE-NEXT: pxor %xmm4, %xmm0
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm7, %xmm3
-; SSE-NEXT: pxor %xmm5, %xmm1
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movq %xmm0, %rax
-; SSE-NEXT: retq
+define i64 @test_v16i64(<16 x i64> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i64:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 56(%ebp), %xmm2
+; X86-SSE-NEXT: pxor 24(%ebp), %xmm0
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 72(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 40(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm3, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: movd %xmm0, %edx
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i64:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm6, %xmm2
+; X64-SSE-NEXT: pxor %xmm4, %xmm0
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm7, %xmm3
+; X64-SSE-NEXT: pxor %xmm5, %xmm1
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movq %xmm0, %rax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i64:
; AVX1: # %bb.0:
@@ -179,13 +240,13 @@ define i64 @test_v16i64(<16 x i64> %a0) {
; vXi32
;
-define i32 @test_v2i32(<2 x i32> %a0) {
+define i32 @test_v2i32(<2 x i32> %a0) nounwind {
; SSE-LABEL: test_v2i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i32:
; AVX: # %bb.0:
@@ -197,7 +258,7 @@ define i32 @test_v2i32(<2 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v4i32(<4 x i32> %a0) {
+define i32 @test_v4i32(<4 x i32> %a0) nounwind {
; SSE-LABEL: test_v4i32:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -205,7 +266,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i32:
; AVX: # %bb.0:
@@ -219,7 +280,7 @@ define i32 @test_v4i32(<4 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v8i32(<8 x i32> %a0) {
+define i32 @test_v8i32(<8 x i32> %a0) nounwind {
; SSE-LABEL: test_v8i32:
; SSE: # %bb.0:
; SSE-NEXT: pxor %xmm1, %xmm0
@@ -228,7 +289,7 @@ define i32 @test_v8i32(<8 x i32> %a0) {
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v8i32:
; AVX1: # %bb.0:
@@ -269,18 +330,36 @@ define i32 @test_v8i32(<8 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v16i32(<16 x i32> %a0) {
-; SSE-LABEL: test_v16i32:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: retq
+define i32 @test_v16i32(<16 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v16i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 8(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v16i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v16i32:
; AVX1: # %bb.0:
@@ -325,22 +404,45 @@ define i32 @test_v16i32(<16 x i32> %a0) {
ret i32 %1
}
-define i32 @test_v32i32(<32 x i32> %a0) {
-; SSE-LABEL: test_v32i32:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm6, %xmm2
-; SSE-NEXT: pxor %xmm4, %xmm0
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm7, %xmm3
-; SSE-NEXT: pxor %xmm5, %xmm1
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: retq
+define i32 @test_v32i32(<32 x i32> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 56(%ebp), %xmm2
+; X86-SSE-NEXT: pxor 24(%ebp), %xmm0
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 72(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 40(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm3, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i32:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm6, %xmm2
+; X64-SSE-NEXT: pxor %xmm4, %xmm0
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm7, %xmm3
+; X64-SSE-NEXT: pxor %xmm5, %xmm1
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i32:
; AVX1: # %bb.0:
@@ -394,7 +496,7 @@ define i32 @test_v32i32(<32 x i32> %a0) {
; vXi16
;
-define i16 @test_v2i16(<2 x i16> %a0) {
+define i16 @test_v2i16(<2 x i16> %a0) nounwind {
; SSE-LABEL: test_v2i16:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -402,7 +504,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i16:
; AVX: # %bb.0:
@@ -415,7 +517,7 @@ define i16 @test_v2i16(<2 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v4i16(<4 x i16> %a0) {
+define i16 @test_v4i16(<4 x i16> %a0) nounwind {
; SSE-LABEL: test_v4i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -425,7 +527,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i16:
; AVX: # %bb.0:
@@ -440,7 +542,7 @@ define i16 @test_v4i16(<4 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v8i16(<8 x i16> %a0) {
+define i16 @test_v8i16(<8 x i16> %a0) nounwind {
; SSE-LABEL: test_v8i16:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -452,7 +554,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i16:
; AVX: # %bb.0:
@@ -469,7 +571,7 @@ define i16 @test_v8i16(<8 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v16i16(<16 x i16> %a0) {
+define i16 @test_v16i16(<16 x i16> %a0) nounwind {
; SSE-LABEL: test_v16i16:
; SSE: # %bb.0:
; SSE-NEXT: pxor %xmm1, %xmm0
@@ -482,7 +584,7 @@ define i16 @test_v16i16(<16 x i16> %a0) {
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v16i16:
; AVX1: # %bb.0:
@@ -532,22 +634,44 @@ define i16 @test_v16i16(<16 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v32i16(<32 x i16> %a0) {
-; SSE-LABEL: test_v32i16:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v32i16(<32 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v32i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 8(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v32i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v32i16:
; AVX1: # %bb.0:
@@ -601,26 +725,53 @@ define i16 @test_v32i16(<32 x i16> %a0) {
ret i16 %1
}
-define i16 @test_v64i16(<64 x i16> %a0) {
-; SSE-LABEL: test_v64i16:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm6, %xmm2
-; SSE-NEXT: pxor %xmm4, %xmm0
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm7, %xmm3
-; SSE-NEXT: pxor %xmm5, %xmm1
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $ax killed $ax killed $eax
-; SSE-NEXT: retq
+define i16 @test_v64i16(<64 x i16> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i16:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 56(%ebp), %xmm2
+; X86-SSE-NEXT: pxor 24(%ebp), %xmm0
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 72(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 40(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm3, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movd %xmm0, %eax
+; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i16:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm6, %xmm2
+; X64-SSE-NEXT: pxor %xmm4, %xmm0
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm7, %xmm3
+; X64-SSE-NEXT: pxor %xmm5, %xmm1
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i16:
; AVX1: # %bb.0:
@@ -683,7 +834,7 @@ define i16 @test_v64i16(<64 x i16> %a0) {
; vXi8
;
-define i8 @test_v2i8(<2 x i8> %a0) {
+define i8 @test_v2i8(<2 x i8> %a0) nounwind {
; SSE-LABEL: test_v2i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -691,7 +842,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v2i8:
; AVX: # %bb.0:
@@ -704,7 +855,7 @@ define i8 @test_v2i8(<2 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v4i8(<4 x i8> %a0) {
+define i8 @test_v4i8(<4 x i8> %a0) nounwind {
; SSE-LABEL: test_v4i8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm1
@@ -715,7 +866,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v4i8:
; AVX: # %bb.0:
@@ -730,7 +881,7 @@ define i8 @test_v4i8(<4 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v8i8(<8 x i8> %a0) {
+define i8 @test_v8i8(<8 x i8> %a0) nounwind {
; SSE-LABEL: test_v8i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
@@ -743,7 +894,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
; SSE-NEXT: pxor %xmm0, %xmm1
; SSE-NEXT: movd %xmm1, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v8i8:
; AVX: # %bb.0:
@@ -760,7 +911,7 @@ define i8 @test_v8i8(<8 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v16i8(<16 x i8> %a0) {
+define i8 @test_v16i8(<16 x i8> %a0) nounwind {
; SSE-LABEL: test_v16i8:
; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
@@ -775,7 +926,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX-LABEL: test_v16i8:
; AVX: # %bb.0:
@@ -794,7 +945,7 @@ define i8 @test_v16i8(<16 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v32i8(<32 x i8> %a0) {
+define i8 @test_v32i8(<32 x i8> %a0) nounwind {
; SSE-LABEL: test_v32i8:
; SSE: # %bb.0:
; SSE-NEXT: pxor %xmm1, %xmm0
@@ -810,7 +961,7 @@ define i8 @test_v32i8(<32 x i8> %a0) {
; SSE-NEXT: pxor %xmm1, %xmm0
; SSE-NEXT: movd %xmm0, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: test_v32i8:
; AVX1: # %bb.0:
@@ -866,25 +1017,50 @@ define i8 @test_v32i8(<32 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v64i8(<64 x i8> %a0) {
-; SSE-LABEL: test_v64i8:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrld $16, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrlw $8, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movd %xmm0, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v64i8(<64 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v64i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 8(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v64i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrld $16, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrlw $8, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movd %xmm0, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v64i8:
; AVX1: # %bb.0:
@@ -944,29 +1120,59 @@ define i8 @test_v64i8(<64 x i8> %a0) {
ret i8 %1
}
-define i8 @test_v128i8(<128 x i8> %a0) {
-; SSE-LABEL: test_v128i8:
-; SSE: # %bb.0:
-; SSE-NEXT: pxor %xmm6, %xmm2
-; SSE-NEXT: pxor %xmm4, %xmm0
-; SSE-NEXT: pxor %xmm2, %xmm0
-; SSE-NEXT: pxor %xmm7, %xmm3
-; SSE-NEXT: pxor %xmm5, %xmm1
-; SSE-NEXT: pxor %xmm3, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movdqa %xmm1, %xmm0
-; SSE-NEXT: psrld $16, %xmm0
-; SSE-NEXT: pxor %xmm1, %xmm0
-; SSE-NEXT: movdqa %xmm0, %xmm1
-; SSE-NEXT: psrlw $8, %xmm1
-; SSE-NEXT: pxor %xmm0, %xmm1
-; SSE-NEXT: movd %xmm1, %eax
-; SSE-NEXT: # kill: def $al killed $al killed $eax
-; SSE-NEXT: retq
+define i8 @test_v128i8(<128 x i8> %a0) nounwind {
+; X86-SSE-LABEL: test_v128i8:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: pushl %ebp
+; X86-SSE-NEXT: movl %esp, %ebp
+; X86-SSE-NEXT: andl $-16, %esp
+; X86-SSE-NEXT: subl $16, %esp
+; X86-SSE-NEXT: movdqa 8(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 56(%ebp), %xmm2
+; X86-SSE-NEXT: pxor 24(%ebp), %xmm0
+; X86-SSE-NEXT: pxor %xmm2, %xmm0
+; X86-SSE-NEXT: pxor 72(%ebp), %xmm3
+; X86-SSE-NEXT: pxor 40(%ebp), %xmm1
+; X86-SSE-NEXT: pxor %xmm3, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movdqa %xmm1, %xmm0
+; X86-SSE-NEXT: psrld $16, %xmm0
+; X86-SSE-NEXT: pxor %xmm1, %xmm0
+; X86-SSE-NEXT: movdqa %xmm0, %xmm1
+; X86-SSE-NEXT: psrlw $8, %xmm1
+; X86-SSE-NEXT: pxor %xmm0, %xmm1
+; X86-SSE-NEXT: movd %xmm1, %eax
+; X86-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X86-SSE-NEXT: movl %ebp, %esp
+; X86-SSE-NEXT: popl %ebp
+; X86-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: test_v128i8:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pxor %xmm6, %xmm2
+; X64-SSE-NEXT: pxor %xmm4, %xmm0
+; X64-SSE-NEXT: pxor %xmm2, %xmm0
+; X64-SSE-NEXT: pxor %xmm7, %xmm3
+; X64-SSE-NEXT: pxor %xmm5, %xmm1
+; X64-SSE-NEXT: pxor %xmm3, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movdqa %xmm1, %xmm0
+; X64-SSE-NEXT: psrld $16, %xmm0
+; X64-SSE-NEXT: pxor %xmm1, %xmm0
+; X64-SSE-NEXT: movdqa %xmm0, %xmm1
+; X64-SSE-NEXT: psrlw $8, %xmm1
+; X64-SSE-NEXT: pxor %xmm0, %xmm1
+; X64-SSE-NEXT: movd %xmm1, %eax
+; X64-SSE-NEXT: # kill: def $al killed $al killed $eax
+; X64-SSE-NEXT: retq
;
; AVX1-LABEL: test_v128i8:
; AVX1: # %bb.0:
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