[PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 7 13:46:25 PDT 2023
jrtc27 added a comment.
Does `__asm__("%z0" :: "r"(0));` still work and give x0?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D154744/new/
https://reviews.llvm.org/D154744
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