[PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt

[Kan Shengchen via Phabricator via llvm-commits]

skan added inline comments.


================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:998
+  if (CmpValDefInstr.getOpcode() == X86::COPY &&
+      CmpInstr.getOpcode() == X86::TEST16rr) {
+    VregDefInstr = MRI->getVRegDef(CmpValDefInstr.getOperand(1).getReg());
----------------
Only one check is needed


================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:1012
+  if (CmpValDefInstr.getOpcode() == X86::SUBREG_TO_REG &&
+      CmpInstr.getOpcode() == X86::TEST64rr) {
+    // As seen in X86 td files, CmpValDefInstr.getOperand(1).getImm() is
----------------
Only one check is needed


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154193/new/

https://reviews.llvm.org/D154193