[llvm] 848f6ab - [X86] Add tests showing failure by matchAddressRecursively to peek through ZEXT nodes to match foldMaskAndShiftToExtract

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-07-09T15:41:38+01:00
New Revision: 848f6abfdb0f4cb87a33707ba852129fd0f05026

URL: https://github.com/llvm/llvm-project/commit/848f6abfdb0f4cb87a33707ba852129fd0f05026
DIFF: https://github.com/llvm/llvm-project/commit/848f6abfdb0f4cb87a33707ba852129fd0f05026.diff

LOG: [X86] Add tests showing failure by matchAddressRecursively to peek through ZEXT nodes to match foldMaskAndShiftToExtract

Test coverage for a similar regression in D146121

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/h-register-addressing-64.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/h-register-addressing-64.ll b/llvm/test/CodeGen/X86/h-register-addressing-64.ll
index 5136cc84c81f66..e65c2c85291a15 100644
--- a/llvm/test/CodeGen/X86/h-register-addressing-64.ll
+++ b/llvm/test/CodeGen/X86/h-register-addressing-64.ll
@@ -100,3 +100,51 @@ define i8 @bar2(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
   %t3 = load i8, ptr %t2, align 8
   ret i8 %t3
 }
+
+define double @ext8(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
+; CHECK-LABEL: ext8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    shrl $5, %esi
+; CHECK-NEXT:    andl $2040, %esi # imm = 0x7F8
+; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    retq
+  %t0 = lshr i32 %x, 5
+  %t1 = and i32 %t0, 2040
+  %t2 = zext i32 %t1 to i64
+  %t3 = getelementptr i8, ptr %p, i64 %t2
+  %t4 = load double, ptr %t3, align 8
+  ret double %t4
+}
+
+define float @ext4(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
+; CHECK-LABEL: ext4:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    shrl $6, %esi
+; CHECK-NEXT:    andl $1020, %esi # imm = 0x3FC
+; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; CHECK-NEXT:    retq
+  %t0 = lshr i32 %x, 6
+  %t1 = and i32 %t0, 1020
+  %t2 = zext i32 %t1 to i64
+  %t3 = getelementptr i8, ptr %p, i64 %t2
+  %t4 = load float, ptr %t3, align 8
+  ret float %t4
+}
+
+define i8 @ext2(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
+; CHECK-LABEL: ext2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    shrl $7, %esi
+; CHECK-NEXT:    andl $510, %esi # imm = 0x1FE
+; CHECK-NEXT:    movzbl (%rdi,%rsi), %eax
+; CHECK-NEXT:    retq
+  %t0 = lshr i32 %x, 7
+  %t1 = and i32 %t0, 510
+  %t2 = zext i32 %t1 to i64
+  %t3 = getelementptr i8, ptr %p, i64 %t2
+  %t4 = load i8, ptr %t3, align 8
+  ret i8 %t4
+}