[PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true

[Allen zhong via Phabricator via llvm-commits]

Allen added inline comments.


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Comment at: llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll:34
 ; CHECK:       middle.block:
-; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
-; CHECK-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
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david-arm wrote:
> I'm guessing that InstCombine does not determine this is guaranteed to always be true? However, I thought that someone did work in the DAGCombiner that will replace this with
> 
>   br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
> 
> when vscale is known to be a power of 2? Are you hoping to benefit from eliminating the scalar tail in IR because it helps us to make better decisions later in the pipeline? I can imagine it's beneficial for LTO where the scalar tail could prevent inlining.
> 
> If I remember correctly one of the problems with folding away the icmp in InstCombine is that it doesn't have access to the TTI interface so we cannot query the target.
I may not have caught your idea, are you saying that the current optimization needs to be handled in combinine ?


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  https://reviews.llvm.org/D154314/new/

https://reviews.llvm.org/D154314