[PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td:325
+
+let Predicates = [HasVendorXCValu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Opcode = OPC_CUSTOM_1.Value, Constraints = "$rd = $rd_wb" in {
+  def CV_ADDNR   : RVInstAlu_rr<0b1000000, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
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Please wrap this to 80 columns and in general try to keep lines close to 80 columns.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153748/new/

https://reviews.llvm.org/D153748