[PATCH] D154422: [AMDGPU] Add new BFI intrinsic

[Matt Arsenault via Phabricator via llvm-commits]

arsenm requested changes to this revision.
arsenm added a comment.
This revision now requires changes to proceed.

We’ve specifically avoided adding intrinsics for easy to match instructions. This needs a semantic justification over just emitting the expanded bit sequence. It’s a huge amount of work teaching every part of the compiler the equivalent bit optimizations.



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Comment at: llvm/test/CodeGen/AMDGPU/bfi_nested.ll:3
-; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
-
-define float @v_bfi_single_nesting_level(float %x, float %y, float %z) {
----------------
Why lose a test


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154422/new/

https://reviews.llvm.org/D154422