[PATCH] D154506: [ARM] in LowerConstantFP, make sure we cover armv6-m execute-only

[Ties Stuij via Phabricator via llvm-commits]

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Currently in LowerConstantFP we only check for the presence of an FPU after we
handle execute-only (XO), which would give us incorrect codegen for XO targets
that don't have an FPU. By moving the `hasVFP3Base()` check up, we guard against
this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154506

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp


Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -7067,6 +7067,10 @@
   ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);
   const APFloat &FPVal = CFP->getValueAPF();
 
+  // This also covers armv6-M Execute Only, as armv6-M doesn't have an FPU
+  if (!ST->hasVFP3Base())
+    return SDValue();
+
   // Prevent floating-point constants from using literal loads
   // when execute-only is enabled.
   if (ST->genExecuteOnly()) {
@@ -7091,9 +7095,6 @@
     }
   }
 
-  if (!ST->hasVFP3Base())
-    return SDValue();
-
   // Use the default (constant pool) lowering for double constants when we have
   // an SP-only FPU
   if (IsDouble && !Subtarget->hasFP64())


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