[PATCH] D68200: [AMDGPU] Extend buffer intrinsics with swizzling

[Piotr Sobczak via Phabricator via llvm-commits]

piotr added inline comments.


================
Comment at: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp:201
+                                 const MCSubtargetInfo &STI, raw_ostream &O) {
+}
+
----------------
kosarev wrote:
> piotr wrote:
> > kosarev wrote:
> > > @piotr Hi Piotr, is this function intentionally empty? I tried to add a `printNamedBit()` call here and didn't catch any test failures.
> > Yes, it is intentionally empty. Th `swz` bit is information that is used by the compiler to create correct code (whether instruction merging is allowed), but it is not part of the ABI - the instruction would behave identical regardless of `swz` being present.
> Thanks. D154432 attempts to clean it up a bit.
Thanks! 

When D68200 was committed the `swz` was a separate field, so we needed the print function. Since then, we have moved to the cache_policy structure (CPol) containing different fields, so `printSWZ` function is no longer needed.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68200/new/

https://reviews.llvm.org/D68200