[PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink

Thu Jul 6 07:52:24 PDT 2023

jobnoorman added a comment.

In D147544#4473532 <https://reviews.llvm.org/D147544#4473532>, @treapster wrote:

> Hello, @jobnoorman, out team is currently evaluating possible improvements to LongJmp pass, and we're wondering what are the opportunities for doing relaxation/stub insertion on JITLink side? I see currently JITLink can build PLT with TableManager and relax some calls to it and GOT accesses, do you think it's possible/worth it to to extend this functionality further to support a more general replacement of instructions as we do in LongJMP? It seems it already works like that for RISCV because of D149526 <https://reviews.llvm.org/D149526>, does that mean we can implement similar patches for AArch64/x86 and throw LongJmp away? I guess it would be tricky for X86 because of all the encoding mess, but i'm wondering what your thoughts are.

I think it should be possible to do this in JITLink, at least for the normal range-extension thunks that a static AArch64 linker would insert. One difficulty I see is that unlike `PLTTableManager`, which adds all stubs to a new section, these thunks would need to be added in the middle of existing sections. I //think// this should be possible with `LinkGraph::splitBlock` but I don't know JITLink well enough to be sure. @lhames: do you have any thoughts on this?

Note that currently, doing this (as well as RISC-V linker relaxation) causes problems in BOLT because it doesn't handle the linker changing symbols well. See D154604 <https://reviews.llvm.org/D154604> for context.

I'm not familiar with `LongJmpPass` but I did notice the following comment:

> We pull this pass inside BOLT because here we can do a better job at stub inserting by manipulating the CFG, something linkers can't do.

So wouldn't you lose something if this was moved to JITLink?

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https://reviews.llvm.org/D147544