[llvm] 80c5698 - Revert "[RISCV][test] Add test coverage for llvm.frexp.*.* intrinsics"
Alex Bradbury via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 5 02:29:24 PDT 2023
Author: Alex Bradbury
Date: 2023-07-05T10:29:06+01:00
New Revision: 80c5698ec30d57f2fa950eb1ced14406e8ec5df0
URL: https://github.com/llvm/llvm-project/commit/80c5698ec30d57f2fa950eb1ced14406e8ec5df0
DIFF: https://github.com/llvm/llvm-project/commit/80c5698ec30d57f2fa950eb1ced14406e8ec5df0.diff
LOG: Revert "[RISCV][test] Add test coverage for llvm.frexp.*.* intrinsics"
Reverting due to weird failure.
This reverts commit 4b8162fe9ccb68b5b42f683df8df42ed43bfd5e7.
Added:
Modified:
Removed:
llvm/test/CodeGen/RISCV/llvm.frexp.ll
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/llvm.frexp.ll b/llvm/test/CodeGen/RISCV/llvm.frexp.ll
deleted file mode 100644
index 52c074cb3fee6b..00000000000000
--- a/llvm/test/CodeGen/RISCV/llvm.frexp.ll
+++ /dev/null
@@ -1,921 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=riscv32 -mattr=+d \
-; RUN: -verify-machineinstrs -target-abi=ilp32d \
-; RUN: | FileCheck -check-prefixes=RV32IFD %s
-; RUN: llc -mtriple=riscv64 -mattr=+d \
-; RUN: -verify-machineinstrs -target-abi=lp64d \
-; RUN: | FileCheck -check-prefixes=RV64IFD %s
-; RUN: llc -mtriple=riscv32 -mattr=+zdinx \
-; RUN: -verify-machineinstrs -target-abi=ilp32 \
-; RUN: | FileCheck -check-prefix=RV32IZFINXZDINX %s
-; RUN: llc -mtriple=riscv64 -mattr=+zdinx \
-; RUN: -verify-machineinstrs -target-abi=lp64 \
-; RUN: | FileCheck -check-prefix=RV64IZFINXZDINX %s
-
-; TODO: Fix soft float codegen (currently crashes).
-
-; TODO: FIXMEs are copied blindly across from the X86 version of this test.
-
-; FIXME
-; define { half, i32 } @test_frexp_f16_i32(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; ret { half, i32 } %result
-; }
-
-; define half @test_frexp_f16_i32_only_use_fract(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 0
-; ret half %result.0
-; }
-
-; define i32 @test_frexp_f16_i32_only_use_exp(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 1
-; ret i32 %result.0
-; }
-
-; define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) nounwind {
-; %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
-; ret { <2 x half>, <2 x i32> } %result
-; }
-
-; define <2 x half> @test_frexp_v2f16_v2i32_only_use_fract(<2 x half> %a) nounwind {
-; %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
-; %result.0 = extractvalue { <2 x half>, <2 x i32> } %result, 0
-; ret <2 x half> %result.0
-; }
-
-; define <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) nounwind {
-; %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
-; %result.1 = extractvalue { <2 x half>, <2 x i32> } %result, 1
-; ret <2 x i32> %result.1
-; }
-
-define { float, i32 } @test_frexp_f32_i32(float %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f32_i32:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: lw a0, 8(sp)
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f32_i32:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: ld a0, 0(sp)
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f32_i32:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: lw a1, 8(sp)
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f32_i32:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: ld a1, 0(sp)
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
- ret { float, i32 } %result
-}
-
-define float @test_frexp_f32_i32_only_use_fract(float %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f32_i32_only_use_fract:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f32_i32_only_use_fract:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f32_i32_only_use_fract:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f32_i32_only_use_fract:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
- %result.0 = extractvalue { float, i32 } %result, 0
- ret float %result.0
-}
-
-define i32 @test_frexp_f32_i32_only_use_exp(float %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f32_i32_only_use_exp:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: lw a0, 8(sp)
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f32_i32_only_use_exp:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: ld a0, 0(sp)
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f32_i32_only_use_exp:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: lw a0, 8(sp)
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f32_i32_only_use_exp:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: ld a0, 0(sp)
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
- %result.0 = extractvalue { float, i32 } %result, 1
- ret i32 %result.0
-}
-
-; FIXME: Widen vector result
-; define { <2 x float>, <2 x i32> } @test_frexp_v2f32_v2i32(<2 x float> %a) nounwind {
-; %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
-; ret { <2 x float>, <2 x i32> } %result
-; }
-
-; define <2 x float> @test_frexp_v2f32_v2i32_only_use_fract(<2 x float> %a) nounwind {
-; %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
-; %result.0 = extractvalue { <2 x float>, <2 x i32> } %result, 0
-; ret <2 x float> %result.0
-; }
-
-; define <2 x i32> @test_frexp_v2f32_v2i32_only_use_exp(<2 x float> %a) nounwind {
-; %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
-; %result.1 = extractvalue { <2 x float>, <2 x i32> } %result, 1
-; ret <2 x i32> %result.1
-; }
-
-define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) nounwind {
-; RV32IFD-LABEL: test_frexp_v4f32_v4i32:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -64
-; RV32IFD-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: fsd fs0, 48(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs1, 40(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs2, 32(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs3, 24(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fmv.s fs0, fa3
-; RV32IFD-NEXT: fmv.s fs1, fa2
-; RV32IFD-NEXT: fmv.s fs2, fa1
-; RV32IFD-NEXT: mv s0, a0
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs3, fa0
-; RV32IFD-NEXT: addi a0, sp, 12
-; RV32IFD-NEXT: fmv.s fa0, fs2
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs2, fa0
-; RV32IFD-NEXT: addi a0, sp, 16
-; RV32IFD-NEXT: fmv.s fa0, fs1
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs1, fa0
-; RV32IFD-NEXT: addi a0, sp, 20
-; RV32IFD-NEXT: fmv.s fa0, fs0
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: lw a0, 20(sp)
-; RV32IFD-NEXT: lw a1, 16(sp)
-; RV32IFD-NEXT: lw a2, 12(sp)
-; RV32IFD-NEXT: lw a3, 8(sp)
-; RV32IFD-NEXT: sw a0, 28(s0)
-; RV32IFD-NEXT: sw a1, 24(s0)
-; RV32IFD-NEXT: sw a2, 20(s0)
-; RV32IFD-NEXT: sw a3, 16(s0)
-; RV32IFD-NEXT: fsw fa0, 12(s0)
-; RV32IFD-NEXT: fsw fs1, 8(s0)
-; RV32IFD-NEXT: fsw fs2, 4(s0)
-; RV32IFD-NEXT: fsw fs3, 0(s0)
-; RV32IFD-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: fld fs0, 48(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs1, 40(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs2, 32(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs3, 24(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 64
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_v4f32_v4i32:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -80
-; RV64IFD-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs0, 56(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs1, 48(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs2, 40(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs3, 32(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fmv.s fs0, fa3
-; RV64IFD-NEXT: fmv.s fs1, fa2
-; RV64IFD-NEXT: fmv.s fs2, fa1
-; RV64IFD-NEXT: mv s0, a0
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs3, fa0
-; RV64IFD-NEXT: addi a0, sp, 8
-; RV64IFD-NEXT: fmv.s fa0, fs2
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs2, fa0
-; RV64IFD-NEXT: addi a0, sp, 16
-; RV64IFD-NEXT: fmv.s fa0, fs1
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs1, fa0
-; RV64IFD-NEXT: addi a0, sp, 24
-; RV64IFD-NEXT: fmv.s fa0, fs0
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: ld a0, 24(sp)
-; RV64IFD-NEXT: ld a1, 16(sp)
-; RV64IFD-NEXT: ld a2, 8(sp)
-; RV64IFD-NEXT: ld a3, 0(sp)
-; RV64IFD-NEXT: sw a0, 28(s0)
-; RV64IFD-NEXT: sw a1, 24(s0)
-; RV64IFD-NEXT: sw a2, 20(s0)
-; RV64IFD-NEXT: sw a3, 16(s0)
-; RV64IFD-NEXT: fsw fa0, 12(s0)
-; RV64IFD-NEXT: fsw fs1, 8(s0)
-; RV64IFD-NEXT: fsw fs2, 4(s0)
-; RV64IFD-NEXT: fsw fs3, 0(s0)
-; RV64IFD-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs0, 56(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs1, 48(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs2, 40(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs3, 32(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 80
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -48
-; RV32IZFINXZDINX-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: mv s0, a4
-; RV32IZFINXZDINX-NEXT: mv s1, a3
-; RV32IZFINXZDINX-NEXT: mv s2, a2
-; RV32IZFINXZDINX-NEXT: mv a2, a1
-; RV32IZFINXZDINX-NEXT: mv s3, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV32IZFINXZDINX-NEXT: mv a0, a2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s4, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 12
-; RV32IZFINXZDINX-NEXT: mv a0, s2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s2, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV32IZFINXZDINX-NEXT: mv a0, s1
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s1, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 20
-; RV32IZFINXZDINX-NEXT: mv a0, s0
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: lw a1, 20(sp)
-; RV32IZFINXZDINX-NEXT: lw a2, 16(sp)
-; RV32IZFINXZDINX-NEXT: lw a3, 12(sp)
-; RV32IZFINXZDINX-NEXT: lw a4, 8(sp)
-; RV32IZFINXZDINX-NEXT: sw a1, 28(s3)
-; RV32IZFINXZDINX-NEXT: sw a2, 24(s3)
-; RV32IZFINXZDINX-NEXT: sw a3, 20(s3)
-; RV32IZFINXZDINX-NEXT: sw a4, 16(s3)
-; RV32IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV32IZFINXZDINX-NEXT: sw s1, 8(s3)
-; RV32IZFINXZDINX-NEXT: sw s2, 4(s3)
-; RV32IZFINXZDINX-NEXT: sw s4, 0(s3)
-; RV32IZFINXZDINX-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 48
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -80
-; RV64IZFINXZDINX-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s1, 56(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s2, 48(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s3, 40(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s4, 32(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv s0, a4
-; RV64IZFINXZDINX-NEXT: mv s1, a3
-; RV64IZFINXZDINX-NEXT: mv s2, a2
-; RV64IZFINXZDINX-NEXT: mv a2, a1
-; RV64IZFINXZDINX-NEXT: mv s3, a0
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: mv a0, a2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s4, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV64IZFINXZDINX-NEXT: mv a0, s2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s2, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV64IZFINXZDINX-NEXT: mv a0, s1
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s1, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 24
-; RV64IZFINXZDINX-NEXT: mv a0, s0
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: ld a1, 24(sp)
-; RV64IZFINXZDINX-NEXT: ld a2, 16(sp)
-; RV64IZFINXZDINX-NEXT: ld a3, 8(sp)
-; RV64IZFINXZDINX-NEXT: ld a4, 0(sp)
-; RV64IZFINXZDINX-NEXT: sw a1, 28(s3)
-; RV64IZFINXZDINX-NEXT: sw a2, 24(s3)
-; RV64IZFINXZDINX-NEXT: sw a3, 20(s3)
-; RV64IZFINXZDINX-NEXT: sw a4, 16(s3)
-; RV64IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV64IZFINXZDINX-NEXT: sw s1, 8(s3)
-; RV64IZFINXZDINX-NEXT: sw s2, 4(s3)
-; RV64IZFINXZDINX-NEXT: sw s4, 0(s3)
-; RV64IZFINXZDINX-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s1, 56(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s2, 48(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s3, 40(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s4, 32(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 80
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)
- ret { <4 x float>, <4 x i32> } %result
-}
-
-define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) nounwind {
-; RV32IFD-LABEL: test_frexp_v4f32_v4i32_only_use_fract:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -64
-; RV32IFD-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: fsd fs0, 48(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs1, 40(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs2, 32(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs3, 24(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fmv.s fs0, fa3
-; RV32IFD-NEXT: fmv.s fs1, fa2
-; RV32IFD-NEXT: fmv.s fs2, fa1
-; RV32IFD-NEXT: mv s0, a0
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs3, fa0
-; RV32IFD-NEXT: addi a0, sp, 12
-; RV32IFD-NEXT: fmv.s fa0, fs2
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs2, fa0
-; RV32IFD-NEXT: addi a0, sp, 16
-; RV32IFD-NEXT: fmv.s fa0, fs1
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fmv.s fs1, fa0
-; RV32IFD-NEXT: addi a0, sp, 20
-; RV32IFD-NEXT: fmv.s fa0, fs0
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: fsw fa0, 12(s0)
-; RV32IFD-NEXT: fsw fs1, 8(s0)
-; RV32IFD-NEXT: fsw fs2, 4(s0)
-; RV32IFD-NEXT: fsw fs3, 0(s0)
-; RV32IFD-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: fld fs0, 48(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs1, 40(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs2, 32(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs3, 24(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 64
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_v4f32_v4i32_only_use_fract:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -80
-; RV64IFD-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs0, 56(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs1, 48(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs2, 40(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs3, 32(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fmv.s fs0, fa3
-; RV64IFD-NEXT: fmv.s fs1, fa2
-; RV64IFD-NEXT: fmv.s fs2, fa1
-; RV64IFD-NEXT: mv s0, a0
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs3, fa0
-; RV64IFD-NEXT: addi a0, sp, 8
-; RV64IFD-NEXT: fmv.s fa0, fs2
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs2, fa0
-; RV64IFD-NEXT: addi a0, sp, 16
-; RV64IFD-NEXT: fmv.s fa0, fs1
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fmv.s fs1, fa0
-; RV64IFD-NEXT: addi a0, sp, 24
-; RV64IFD-NEXT: fmv.s fa0, fs0
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: fsw fa0, 12(s0)
-; RV64IFD-NEXT: fsw fs1, 8(s0)
-; RV64IFD-NEXT: fsw fs2, 4(s0)
-; RV64IFD-NEXT: fsw fs3, 0(s0)
-; RV64IFD-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs0, 56(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs1, 48(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs2, 40(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs3, 32(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 80
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_fract:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -48
-; RV32IZFINXZDINX-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: mv s0, a4
-; RV32IZFINXZDINX-NEXT: mv s1, a3
-; RV32IZFINXZDINX-NEXT: mv s2, a2
-; RV32IZFINXZDINX-NEXT: mv a2, a1
-; RV32IZFINXZDINX-NEXT: mv s3, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV32IZFINXZDINX-NEXT: mv a0, a2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s4, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 12
-; RV32IZFINXZDINX-NEXT: mv a0, s2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s2, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV32IZFINXZDINX-NEXT: mv a0, s1
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: mv s1, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 20
-; RV32IZFINXZDINX-NEXT: mv a0, s0
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV32IZFINXZDINX-NEXT: sw s1, 8(s3)
-; RV32IZFINXZDINX-NEXT: sw s2, 4(s3)
-; RV32IZFINXZDINX-NEXT: sw s4, 0(s3)
-; RV32IZFINXZDINX-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 48
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_fract:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -80
-; RV64IZFINXZDINX-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s1, 56(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s2, 48(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s3, 40(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s4, 32(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv s0, a4
-; RV64IZFINXZDINX-NEXT: mv s1, a3
-; RV64IZFINXZDINX-NEXT: mv s2, a2
-; RV64IZFINXZDINX-NEXT: mv a2, a1
-; RV64IZFINXZDINX-NEXT: mv s3, a0
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: mv a0, a2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s4, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV64IZFINXZDINX-NEXT: mv a0, s2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s2, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV64IZFINXZDINX-NEXT: mv a0, s1
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: mv s1, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 24
-; RV64IZFINXZDINX-NEXT: mv a0, s0
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV64IZFINXZDINX-NEXT: sw s1, 8(s3)
-; RV64IZFINXZDINX-NEXT: sw s2, 4(s3)
-; RV64IZFINXZDINX-NEXT: sw s4, 0(s3)
-; RV64IZFINXZDINX-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s1, 56(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s2, 48(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s3, 40(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s4, 32(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 80
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)
- %result.0 = extractvalue { <4 x float>, <4 x i32> } %result, 0
- ret <4 x float> %result.0
-}
-
-define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) nounwind {
-; RV32IFD-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -48
-; RV32IFD-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: fsd fs0, 32(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs1, 24(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fsd fs2, 16(sp) # 8-byte Folded Spill
-; RV32IFD-NEXT: fmv.s fs0, fa3
-; RV32IFD-NEXT: fmv.s fs1, fa2
-; RV32IFD-NEXT: fmv.s fs2, fa1
-; RV32IFD-NEXT: mv s0, a0
-; RV32IFD-NEXT: mv a0, sp
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: addi a0, sp, 4
-; RV32IFD-NEXT: fmv.s fa0, fs2
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: fmv.s fa0, fs1
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: addi a0, sp, 12
-; RV32IFD-NEXT: fmv.s fa0, fs0
-; RV32IFD-NEXT: call frexpf at plt
-; RV32IFD-NEXT: lw a0, 12(sp)
-; RV32IFD-NEXT: lw a1, 8(sp)
-; RV32IFD-NEXT: lw a2, 4(sp)
-; RV32IFD-NEXT: lw a3, 0(sp)
-; RV32IFD-NEXT: sw a0, 12(s0)
-; RV32IFD-NEXT: sw a1, 8(s0)
-; RV32IFD-NEXT: sw a2, 4(s0)
-; RV32IFD-NEXT: sw a3, 0(s0)
-; RV32IFD-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: fld fs0, 32(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs1, 24(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: fld fs2, 16(sp) # 8-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 48
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -80
-; RV64IFD-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs0, 56(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs1, 48(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fsd fs2, 40(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: fmv.s fs0, fa3
-; RV64IFD-NEXT: fmv.s fs1, fa2
-; RV64IFD-NEXT: fmv.s fs2, fa1
-; RV64IFD-NEXT: mv s0, a0
-; RV64IFD-NEXT: addi a0, sp, 8
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: addi a0, sp, 16
-; RV64IFD-NEXT: fmv.s fa0, fs2
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: addi a0, sp, 24
-; RV64IFD-NEXT: fmv.s fa0, fs1
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: addi a0, sp, 32
-; RV64IFD-NEXT: fmv.s fa0, fs0
-; RV64IFD-NEXT: call frexpf at plt
-; RV64IFD-NEXT: ld a0, 32(sp)
-; RV64IFD-NEXT: ld a1, 24(sp)
-; RV64IFD-NEXT: ld a2, 16(sp)
-; RV64IFD-NEXT: ld a3, 8(sp)
-; RV64IFD-NEXT: sw a0, 12(s0)
-; RV64IFD-NEXT: sw a1, 8(s0)
-; RV64IFD-NEXT: sw a2, 4(s0)
-; RV64IFD-NEXT: sw a3, 0(s0)
-; RV64IFD-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs0, 56(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs1, 48(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: fld fs2, 40(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 80
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -48
-; RV32IZFINXZDINX-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: mv s0, a4
-; RV32IZFINXZDINX-NEXT: mv s1, a3
-; RV32IZFINXZDINX-NEXT: mv s2, a2
-; RV32IZFINXZDINX-NEXT: mv a2, a1
-; RV32IZFINXZDINX-NEXT: mv s3, a0
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 12
-; RV32IZFINXZDINX-NEXT: mv a0, a2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV32IZFINXZDINX-NEXT: mv a0, s2
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 20
-; RV32IZFINXZDINX-NEXT: mv a0, s1
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: addi a1, sp, 24
-; RV32IZFINXZDINX-NEXT: mv a0, s0
-; RV32IZFINXZDINX-NEXT: call frexpf at plt
-; RV32IZFINXZDINX-NEXT: lw a0, 24(sp)
-; RV32IZFINXZDINX-NEXT: lw a1, 20(sp)
-; RV32IZFINXZDINX-NEXT: lw a2, 16(sp)
-; RV32IZFINXZDINX-NEXT: lw a3, 12(sp)
-; RV32IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV32IZFINXZDINX-NEXT: sw a1, 8(s3)
-; RV32IZFINXZDINX-NEXT: sw a2, 4(s3)
-; RV32IZFINXZDINX-NEXT: sw a3, 0(s3)
-; RV32IZFINXZDINX-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 48
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -80
-; RV64IZFINXZDINX-NEXT: sd ra, 72(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s0, 64(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s1, 56(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s2, 48(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: sd s3, 40(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv s0, a4
-; RV64IZFINXZDINX-NEXT: mv s1, a3
-; RV64IZFINXZDINX-NEXT: mv s2, a2
-; RV64IZFINXZDINX-NEXT: mv a2, a1
-; RV64IZFINXZDINX-NEXT: mv s3, a0
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 8
-; RV64IZFINXZDINX-NEXT: mv a0, a2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 16
-; RV64IZFINXZDINX-NEXT: mv a0, s2
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 24
-; RV64IZFINXZDINX-NEXT: mv a0, s1
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: addi a1, sp, 32
-; RV64IZFINXZDINX-NEXT: mv a0, s0
-; RV64IZFINXZDINX-NEXT: call frexpf at plt
-; RV64IZFINXZDINX-NEXT: ld a0, 32(sp)
-; RV64IZFINXZDINX-NEXT: ld a1, 24(sp)
-; RV64IZFINXZDINX-NEXT: ld a2, 16(sp)
-; RV64IZFINXZDINX-NEXT: ld a3, 8(sp)
-; RV64IZFINXZDINX-NEXT: sw a0, 12(s3)
-; RV64IZFINXZDINX-NEXT: sw a1, 8(s3)
-; RV64IZFINXZDINX-NEXT: sw a2, 4(s3)
-; RV64IZFINXZDINX-NEXT: sw a3, 0(s3)
-; RV64IZFINXZDINX-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s1, 56(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s2, 48(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: ld s3, 40(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 80
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)
- %result.1 = extractvalue { <4 x float>, <4 x i32> } %result, 1
- ret <4 x i32> %result.1
-}
-
-define { double, i32 } @test_frexp_f64_i32(double %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f64_i32:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexp at plt
-; RV32IFD-NEXT: lw a0, 8(sp)
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f64_i32:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexp at plt
-; RV64IFD-NEXT: ld a0, 0(sp)
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f64_i32:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a2, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexp at plt
-; RV32IZFINXZDINX-NEXT: lw a2, 8(sp)
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f64_i32:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexp at plt
-; RV64IZFINXZDINX-NEXT: ld a1, 0(sp)
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
- ret { double, i32 } %result
-}
-
-define double @test_frexp_f64_i32_only_use_fract(double %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f64_i32_only_use_fract:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexp at plt
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f64_i32_only_use_fract:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexp at plt
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f64_i32_only_use_fract:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a2, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexp at plt
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f64_i32_only_use_fract:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexp at plt
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
- %result.0 = extractvalue { double, i32 } %result, 0
- ret double %result.0
-}
-
-define i32 @test_frexp_f64_i32_only_use_exp(double %a) nounwind {
-; RV32IFD-LABEL: test_frexp_f64_i32_only_use_exp:
-; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IFD-NEXT: addi a0, sp, 8
-; RV32IFD-NEXT: call frexp at plt
-; RV32IFD-NEXT: lw a0, 8(sp)
-; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IFD-NEXT: addi sp, sp, 16
-; RV32IFD-NEXT: ret
-;
-; RV64IFD-LABEL: test_frexp_f64_i32_only_use_exp:
-; RV64IFD: # %bb.0:
-; RV64IFD-NEXT: addi sp, sp, -16
-; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IFD-NEXT: mv a0, sp
-; RV64IFD-NEXT: call frexp at plt
-; RV64IFD-NEXT: ld a0, 0(sp)
-; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IFD-NEXT: addi sp, sp, 16
-; RV64IFD-NEXT: ret
-;
-; RV32IZFINXZDINX-LABEL: test_frexp_f64_i32_only_use_exp:
-; RV32IZFINXZDINX: # %bb.0:
-; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
-; RV32IZFINXZDINX-NEXT: addi a2, sp, 8
-; RV32IZFINXZDINX-NEXT: call frexp at plt
-; RV32IZFINXZDINX-NEXT: lw a0, 8(sp)
-; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
-; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV32IZFINXZDINX-NEXT: ret
-;
-; RV64IZFINXZDINX-LABEL: test_frexp_f64_i32_only_use_exp:
-; RV64IZFINXZDINX: # %bb.0:
-; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
-; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
-; RV64IZFINXZDINX-NEXT: mv a1, sp
-; RV64IZFINXZDINX-NEXT: call frexp at plt
-; RV64IZFINXZDINX-NEXT: ld a0, 0(sp)
-; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
-; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
-; RV64IZFINXZDINX-NEXT: ret
- %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
- %result.0 = extractvalue { double, i32 } %result, 1
- ret i32 %result.0
-}
-
-; FIXME: Widen vector result
-; define { <2 x double>, <2 x i32> } @test_frexp_v2f64_v2i32(<2 x double> %a) nounwind {
-; %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
-; ret { <2 x double>, <2 x i32> } %result
-; }
-
-; define <2 x double> @test_frexp_v2f64_v2i32_only_use_fract(<2 x double> %a) nounwind {
-; %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
-; %result.0 = extractvalue { <2 x double>, <2 x i32> } %result, 0
-; ret <2 x double> %result.0
-; }
-
-; define <2 x i32> @test_frexp_v2f64_v2i32_only_use_exp(<2 x double> %a) nounwind {
-; %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
-; %result.1 = extractvalue { <2 x double>, <2 x i32> } %result, 1
-; ret <2 x i32> %result.1
-; }
-
-declare { float, i32 } @llvm.frexp.f32.i32(float) #0
-declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0
-declare { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float>) #0
-
-declare { half, i32 } @llvm.frexp.f16.i32(half) #0
-declare { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half>) #0
-
-declare { double, i32 } @llvm.frexp.f64.i32(double) #0
-declare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>) #0
-
-declare { half, i16 } @llvm.frexp.f16.i16(half) #0
-declare { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half>) #0
-
-attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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