[compiler-rt] 2b5ea51 - [compiler-rt][RISCV] Fix __fe_getround and __fe_raise_inexact for Zfinx

Kito Cheng via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 6 23:24:56 PDT 2023


Author: Kito Cheng
Date: 2023-07-07T14:24:50+08:00
New Revision: 2b5ea51a417fd4454128bd55bf3eb7e7719dee2a

URL: https://github.com/llvm/llvm-project/commit/2b5ea51a417fd4454128bd55bf3eb7e7719dee2a
DIFF: https://github.com/llvm/llvm-project/commit/2b5ea51a417fd4454128bd55bf3eb7e7719dee2a.diff

LOG: [compiler-rt][RISCV] Fix __fe_getround and __fe_raise_inexact for Zfinx

Zfinx extension also provide floating point environment like F extension, so
enable that on `__fe_getround` and `__fe_raise_inexact` too.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D154570

Added: 
    

Modified: 
    compiler-rt/lib/builtins/riscv/fp_mode.c

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/builtins/riscv/fp_mode.c b/compiler-rt/lib/builtins/riscv/fp_mode.c
index c542c34c9cc8c8..1a5a3de95de914 100644
--- a/compiler-rt/lib/builtins/riscv/fp_mode.c
+++ b/compiler-rt/lib/builtins/riscv/fp_mode.c
@@ -15,7 +15,7 @@
 #define RISCV_INEXACT    0x1
 
 CRT_FE_ROUND_MODE __fe_getround(void) {
-#if defined(__riscv_f)
+#if defined(__riscv_f) || defined(__riscv_zfinx)
   int frm;
   __asm__ __volatile__("frrm %0" : "=r" (frm));
   switch (frm) {
@@ -35,7 +35,7 @@ CRT_FE_ROUND_MODE __fe_getround(void) {
 }
 
 int __fe_raise_inexact(void) {
-#if defined(__riscv_f)
+#if defined(__riscv_f) || defined(__riscv_zfinx)
   __asm__ __volatile__("csrsi fflags, %0" :: "i" (RISCV_INEXACT));
 #endif
   return 0;


        


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