[PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 7 13:59:32 PDT 2023


jrtc27 added a comment.

In D154744#4481967 <https://reviews.llvm.org/D154744#4481967>, @craig.topper wrote:

> In D154744#4481932 <https://reviews.llvm.org/D154744#4481932>, @jrtc27 wrote:
>
>> Does `__asm__("%z0" :: "r"(0));` still work and give x0?
>
> That doesn't work in gcc https://godbolt.org/z/x3vPWao1d

Huh, only for "i" then I guess. Bit sad but oh well.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154744/new/

https://reviews.llvm.org/D154744



More information about the llvm-commits mailing list