[PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P

[QIHAN CAI via Phabricator via llvm-commits]

realqhc updated this revision to Diff 538321.
realqhc marked an inline comment as done.
realqhc added a comment.

fix the problem of code being wrongly wrapped to 120 columns


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153748/new/

https://reviews.llvm.org/D153748

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td

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