[PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes

Derek Schuff via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 7 13:35:42 PDT 2023


dschuff added inline comments.


================
Comment at: llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp:129
+              SMLoc(),
+              Twine("Wasm globals should only be accessed symbolically!"));
         default:
----------------
mojingran wrote:
> sbc100 wrote:
> > Is this error specific to inline assembly?
> > 
> > Looking at `global_set_expected_expression_operand` in `llvm/test/MC/WebAssembly/type-checker-errors.s` I see a different error.. so I guess maybe it fails before it gets here in the case to non-inline assembly?
> > 
> > I wonder if we shouldn't just allow this.. even though its kind odd to want to do it.. 
> Noted, I tried llvm-mc on the assembly generated from my testcase, and it is also giving a different error. I am not sure why it is behaving differently if we split up the 2 stages.
> I wonder if we shouldn't just allow this.. even though its kind odd to want to do it..

In other architectures there are use cases for hardcoding register names as well as using symbols and letting the regalloc choose. Some of them are for constraints in particular instructions (e.g. instruction that always leaves 2 outputs in rax/rcx), or for ABIs that specify register use. Wasm doesn't really have either one of those. So I think I'd be fine having this limitation until someone proposes a use case for it.



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https://reviews.llvm.org/D154734



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