[PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P

[Simon Cook via Phabricator via llvm-commits]

simoncook added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:770
 
+def FeatureVendorXCvsimd
+    : SubtargetFeature<"xcvsimd", "HasVendorXCvsimd", "true",
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nit for consistency: I notice the XCVmac above has V in capitals, but this one doesn't


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153721/new/

https://reviews.llvm.org/D153721