[PATCH] D154645: [RISCV] Remove legacy TA/TU pseudo distinction of vmerge and carry-in arithmetic operations [NFC[

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 6 12:46:01 PDT 2023


reames created this revision.
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This change continues with the line of work discussed in https://discourse.llvm.org/t/riscv-transition-in-vector-pseudo-structure-policy-variants/71295.

This is analogous to other patches in the series, but with one key difference - the resulting pseudo does *not* have a policy operand.  We could add one for vmerge, but the some of the multiclasses are sufficiently entwined with the mask producing arithmetic instructions that the change delta becomes unmanageable.  Note that these instructions are *not* in the RISCVMaskedPseudo table, and thus the difference doesn't complicate other code.  The main value of working incrementally here is that we get to eagerly cleanup the IsTA logic flowing through the post-ISEL combines.

This should be fully orthogonal to D154620 <https://reviews.llvm.org/D154620>, but if you combine them, we're left with a much cleaner post-ISEL combine structure.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154645

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir

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