[PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/include/llvm/CodeGen/MachineBasicBlock.h:118
+  /// blocks are split in the middle of a call sequence.
+  int SPAdjustment = 0;
+
----------------
arsenm wrote:
> foad wrote:
> > On 64-bit hosts this fills a hole in the struct so does not increase the size of `MachineBasicBlock`.
> Needs mir serialization 
Also the llvm-reduce mir cloner should copy this


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154281/new/

https://reviews.llvm.org/D154281