[llvm] fa78983 - [PEI][Mips] Switch to backwards frame index elimination
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 7 10:32:54 PDT 2023
Author: Jay Foad
Date: 2023-07-07T18:30:08+01:00
New Revision: fa78983bcb355bbe9a3cf40870a2378d03ffb591
URL: https://github.com/llvm/llvm-project/commit/fa78983bcb355bbe9a3cf40870a2378d03ffb591
DIFF: https://github.com/llvm/llvm-project/commit/fa78983bcb355bbe9a3cf40870a2378d03ffb591.diff
LOG: [PEI][Mips] Switch to backwards frame index elimination
This adds support for running PEI::replaceFrameIndicesBackward with no
RegisterScavenger, and basic support for eliminating call frame pseudo
instructions.
Differential Revision: https://reviews.llvm.org/D154347
Added:
Modified:
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/Target/Mips/MipsRegisterInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index c062749aa830ab..e323aaaeefaf85 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -1459,13 +1459,23 @@ void PEI::replaceFrameIndicesBackward(MachineBasicBlock *BB,
assert(MF.getSubtarget().getRegisterInfo() &&
"getRegisterInfo() must be implemented!");
+ const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
+ const TargetFrameLowering &TFI = *MF.getSubtarget().getFrameLowering();
- RS->enterBasicBlockEnd(*BB);
+ RegScavenger *LocalRS = FrameIndexEliminationScavenging ? RS : nullptr;
+ if (LocalRS)
+ LocalRS->enterBasicBlockEnd(*BB);
for (MachineInstr &MI : make_early_inc_range(reverse(*BB))) {
+ if (TII.isFrameInstr(MI)) {
+ TFI.eliminateCallFramePseudoInstr(MF, *BB, &MI);
+ continue;
+ }
+
// Step backwards to get the liveness state at (immedately after) MI.
- RS->backward(MI);
+ if (LocalRS)
+ LocalRS->backward(MI);
for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
if (!MI.getOperand(i).isFI())
@@ -1478,9 +1488,12 @@ void PEI::replaceFrameIndicesBackward(MachineBasicBlock *BB,
//
// Save and restore the scavenger's position around the call to
// eliminateFrameIndex in case it erases MI and invalidates the iterator.
- MachineBasicBlock::iterator Save = std::next(RS->getCurrentPosition());
+ MachineBasicBlock::iterator Save;
+ if (LocalRS)
+ Save = std::next(LocalRS->getCurrentPosition());
bool Removed = TRI.eliminateFrameIndex(MI, SPAdj, i, RS);
- RS->skipTo(std::prev(Save));
+ if (LocalRS)
+ LocalRS->skipTo(std::prev(Save));
if (Removed)
break;
@@ -1496,7 +1509,7 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
- if (RS && TRI.supportsBackwardScavenger())
+ if (TRI.supportsBackwardScavenger())
return replaceFrameIndicesBackward(BB, MF, SPAdj);
if (RS && FrameIndexEliminationScavenging)
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.h b/llvm/lib/Target/Mips/MipsRegisterInfo.h
index b002f4cf3ae7a1..1463304d35ce91 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.h
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.h
@@ -70,6 +70,8 @@ class MipsRegisterInfo : public MipsGenRegisterInfo {
/// Return GPR register class.
virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
+ bool supportsBackwardScavenger() const override { return true; }
+
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,
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