[PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added a comment.

GCC is using `rJ` and `%z<N>` for such case, but I found https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md#constraints-on-operands-of-inline-assembly-statements isn't document that, seems like we should add more NOTE to mention that.

Few more info about `r` in GCC, `r` is special operand constraint, it must be point to some register class, no symbolic operand or immediate is allowed, it's kind of hard code logic in generic code.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D154744/new/

https://reviews.llvm.org/D154744