[llvm] 4c691ae - [M68k] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 4 12:20:09 PDT 2023
Author: Sergei Barannikov
Date: 2023-07-04T22:19:59+03:00
New Revision: 4c691aedd37fb065c411dd246527dde61a56321b
URL: https://github.com/llvm/llvm-project/commit/4c691aedd37fb065c411dd246527dde61a56321b
DIFF: https://github.com/llvm/llvm-project/commit/4c691aedd37fb065c411dd246527dde61a56321b.diff
LOG: [M68k] Replace OperandMatchResultTy with ParseStatus (NFC)
ParseStatus is slightly more convenient to use due to implicit
conversion from bool, which allows to do something like:
```
return Error(L, "msg");
```
when with MatchOperandResultTy it had to be:
```
Error(L, "msg");
return MatchOperand_ParseFail;
```
It also has more appropriate name since parse* methods are not only for
parsing operands.
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D154320
Added:
Modified:
llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp b/llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
index 1d9b5055dd7916..4fca313c863e9f 100644
--- a/llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
+++ b/llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
@@ -44,15 +44,15 @@ class M68kAsmParser : public MCTargetAsmParser {
bool missingFeature(const SMLoc &Loc, const uint64_t &ErrorInfo);
bool emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const;
bool parseRegisterName(MCRegister &RegNo, SMLoc Loc, StringRef RegisterName);
- OperandMatchResultTy parseRegister(MCRegister &RegNo);
+ ParseStatus parseRegister(MCRegister &RegNo);
// Parser functions.
void eatComma();
bool isExpr();
- OperandMatchResultTy parseImm(OperandVector &Operands);
- OperandMatchResultTy parseMemOp(OperandVector &Operands);
- OperandMatchResultTy parseRegOrMoveMask(OperandVector &Operands);
+ ParseStatus parseImm(OperandVector &Operands);
+ ParseStatus parseMemOp(OperandVector &Operands);
+ ParseStatus parseRegOrMoveMask(OperandVector &Operands);
public:
M68kAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
@@ -673,7 +673,7 @@ bool M68kAsmParser::parseRegisterName(MCRegister &RegNo, SMLoc Loc,
return false;
}
-OperandMatchResultTy M68kAsmParser::parseRegister(MCRegister &RegNo) {
+ParseStatus M68kAsmParser::parseRegister(MCRegister &RegNo) {
bool HasPercent = false;
AsmToken PercentToken;
@@ -683,14 +683,14 @@ OperandMatchResultTy M68kAsmParser::parseRegister(MCRegister &RegNo) {
HasPercent = true;
PercentToken = Lex();
} else if (!RegisterPrefixOptional.getValue()) {
- return MatchOperand_NoMatch;
+ return ParseStatus::NoMatch;
}
if (!Parser.getTok().is(AsmToken::Identifier)) {
if (HasPercent) {
getLexer().UnLex(PercentToken);
}
- return MatchOperand_NoMatch;
+ return ParseStatus::NoMatch;
}
auto RegisterName = Parser.getTok().getString();
@@ -698,11 +698,11 @@ OperandMatchResultTy M68kAsmParser::parseRegister(MCRegister &RegNo) {
if (HasPercent) {
getLexer().UnLex(PercentToken);
}
- return MatchOperand_NoMatch;
+ return ParseStatus::NoMatch;
}
Parser.Lex();
- return MatchOperand_Success;
+ return ParseStatus::Success;
}
bool M68kAsmParser::parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
@@ -719,7 +719,7 @@ OperandMatchResultTy M68kAsmParser::tryParseRegister(MCRegister &RegNo,
SMLoc &StartLoc,
SMLoc &EndLoc) {
StartLoc = getLexer().getLoc();
- auto Result = parseRegister(RegNo);
+ ParseStatus Result = parseRegister(RegNo);
EndLoc = getLexer().getLoc();
return Result;
}
@@ -737,34 +737,31 @@ bool M68kAsmParser::isExpr() {
}
}
-OperandMatchResultTy M68kAsmParser::parseImm(OperandVector &Operands) {
- if (getLexer().isNot(AsmToken::Hash)) {
- return MatchOperand_NoMatch;
- }
+ParseStatus M68kAsmParser::parseImm(OperandVector &Operands) {
+ if (getLexer().isNot(AsmToken::Hash))
+ return ParseStatus::NoMatch;
SMLoc Start = getLexer().getLoc();
Parser.Lex();
SMLoc End;
const MCExpr *Expr;
- if (getParser().parseExpression(Expr, End)) {
- return MatchOperand_ParseFail;
- }
+ if (getParser().parseExpression(Expr, End))
+ return ParseStatus::Failure;
Operands.push_back(M68kOperand::createImm(Expr, Start, End));
- return MatchOperand_Success;
+ return ParseStatus::Success;
}
-OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
+ParseStatus M68kAsmParser::parseMemOp(OperandVector &Operands) {
SMLoc Start = getLexer().getLoc();
bool IsPD = false;
M68kMemOp MemOp;
// Check for a plain register or register mask.
- auto Result = parseRegOrMoveMask(Operands);
- if (Result != llvm::MatchOperand_NoMatch) {
+ ParseStatus Result = parseRegOrMoveMask(Operands);
+ if (!Result.isNoMatch())
return Result;
- }
// Check for pre-decrement & outer displacement.
bool HasDisplacement = false;
@@ -772,9 +769,8 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
IsPD = true;
Parser.Lex();
} else if (isExpr()) {
- if (Parser.parseExpression(MemOp.OuterDisp)) {
- return MatchOperand_ParseFail;
- }
+ if (Parser.parseExpression(MemOp.OuterDisp))
+ return ParseStatus::Failure;
HasDisplacement = true;
}
@@ -783,21 +779,19 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
MemOp.Op = M68kMemOp::Kind::Addr;
Operands.push_back(
M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
- return MatchOperand_Success;
- } else if (IsPD) {
- Error(getLexer().getLoc(), "expected (");
- return MatchOperand_ParseFail;
+ return ParseStatus::Success;
}
+ if (IsPD)
+ return Error(getLexer().getLoc(), "expected (");
- return MatchOperand_NoMatch;
+ return ParseStatus::NoMatch;
}
Parser.Lex();
// Check for constant dereference & MIT-style displacement
if (!HasDisplacement && isExpr()) {
- if (Parser.parseExpression(MemOp.OuterDisp)) {
- return MatchOperand_ParseFail;
- }
+ if (Parser.parseExpression(MemOp.OuterDisp))
+ return ParseStatus::Failure;
HasDisplacement = true;
// If we're not followed by a comma, we're a constant dereference.
@@ -805,21 +799,18 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
MemOp.Op = M68kMemOp::Kind::Addr;
Operands.push_back(
M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
- return MatchOperand_Success;
+ return ParseStatus::Success;
}
Parser.Lex();
}
Result = parseRegister(MemOp.OuterReg);
- if (Result == MatchOperand_ParseFail) {
- return MatchOperand_ParseFail;
- }
+ if (Result.isFailure())
+ return ParseStatus::Failure;
- if (Result != MatchOperand_Success) {
- Error(getLexer().getLoc(), "expected register");
- return MatchOperand_ParseFail;
- }
+ if (!Result.isSuccess())
+ return Error(getLexer().getLoc(), "expected register");
// Check for Index.
bool HasIndex = false;
@@ -827,14 +818,11 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
Parser.Lex();
Result = parseRegister(MemOp.InnerReg);
- if (Result == MatchOperand_ParseFail) {
+ if (Result.isFailure())
return Result;
- }
- if (Result == MatchOperand_NoMatch) {
- Error(getLexer().getLoc(), "expected register");
- return MatchOperand_ParseFail;
- }
+ if (Result.isNoMatch())
+ return Error(getLexer().getLoc(), "expected register");
// TODO: parse size, scale and inner displacement.
MemOp.Size = 4;
@@ -843,10 +831,8 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
HasIndex = true;
}
- if (Parser.getTok().isNot(AsmToken::RParen)) {
- Error(getLexer().getLoc(), "expected )");
- return MatchOperand_ParseFail;
- }
+ if (Parser.getTok().isNot(AsmToken::RParen))
+ return Error(getLexer().getLoc(), "expected )");
Parser.Lex();
bool IsPI = false;
@@ -858,11 +844,9 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
SMLoc End = getLexer().getLoc();
unsigned OpCount = IsPD + IsPI + (HasIndex || HasDisplacement);
- if (OpCount > 1) {
- Error(Start, "only one of post-increment, pre-decrement or displacement "
- "can be used");
- return MatchOperand_ParseFail;
- }
+ if (OpCount > 1)
+ return Error(Start, "only one of post-increment, pre-decrement or "
+ "displacement can be used");
if (IsPD) {
MemOp.Op = M68kMemOp::Kind::RegPreDecrement;
@@ -877,11 +861,10 @@ OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
}
Operands.push_back(M68kOperand::createMemOp(MemOp, Start, End));
- return MatchOperand_Success;
+ return ParseStatus::Success;
}
-OperandMatchResultTy
-M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
+ParseStatus M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
SMLoc Start = getLexer().getLoc();
M68kMemOp MemOp(M68kMemOp::Kind::RegMask);
MemOp.RegMask = 0;
@@ -891,22 +874,17 @@ M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
(MemOp.Op == M68kMemOp::Kind::RegMask) && (MemOp.RegMask == 0);
MCRegister FirstRegister;
- auto Result = parseRegister(FirstRegister);
- if (IsFirstRegister && (Result == llvm::MatchOperand_NoMatch)) {
- return MatchOperand_NoMatch;
- }
- if (Result != llvm::MatchOperand_Success) {
- Error(getLexer().getLoc(), "expected start register");
- return MatchOperand_ParseFail;
- }
+ ParseStatus Result = parseRegister(FirstRegister);
+ if (IsFirstRegister && Result.isNoMatch())
+ return ParseStatus::NoMatch;
+ if (!Result.isSuccess())
+ return Error(getLexer().getLoc(), "expected start register");
MCRegister LastRegister = FirstRegister;
if (parseOptionalToken(AsmToken::Minus)) {
Result = parseRegister(LastRegister);
- if (Result != llvm::MatchOperand_Success) {
- Error(getLexer().getLoc(), "expected end register");
- return MatchOperand_ParseFail;
- }
+ if (!Result.isSuccess())
+ return Error(getLexer().getLoc(), "expected end register");
}
unsigned FirstRegisterIndex = getRegisterIndex(FirstRegister);
@@ -927,23 +905,17 @@ M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
MemOp.Op = M68kMemOp::Kind::RegMask;
MemOp.RegMask = 1 << getRegisterIndex(MemOp.OuterReg);
- if (MemOp.RegMask == 0) {
- Error(getLexer().getLoc(),
- "special registers cannot be used in register masks");
- return MatchOperand_ParseFail;
- }
+ if (MemOp.RegMask == 0)
+ return Error(getLexer().getLoc(),
+ "special registers cannot be used in register masks");
}
- if ((FirstRegisterIndex >= 16) || (LastRegisterIndex >= 16)) {
- Error(getLexer().getLoc(),
- "special registers cannot be used in register masks");
- return MatchOperand_ParseFail;
- }
+ if ((FirstRegisterIndex >= 16) || (LastRegisterIndex >= 16))
+ return Error(getLexer().getLoc(),
+ "special registers cannot be used in register masks");
- if (NewMaskBits & MemOp.RegMask) {
- Error(getLexer().getLoc(), "conflicting masked registers");
- return MatchOperand_ParseFail;
- }
+ if (NewMaskBits & MemOp.RegMask)
+ return Error(getLexer().getLoc(), "conflicting masked registers");
MemOp.RegMask |= NewMaskBits;
}
@@ -954,7 +926,7 @@ M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
Operands.push_back(
M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
- return MatchOperand_Success;
+ return ParseStatus::Success;
}
void M68kAsmParser::eatComma() {
@@ -976,10 +948,9 @@ bool M68kAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
First = false;
}
- auto MatchResult = MatchOperandParserImpl(Operands, Name);
- if (MatchResult == MatchOperand_Success) {
+ ParseStatus MatchResult = MatchOperandParserImpl(Operands, Name);
+ if (MatchResult.isSuccess())
continue;
- }
// Add custom operand formats here...
SMLoc Loc = getLexer().getLoc();
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