[PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Luke Lau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 7 13:04:05 PDT 2023
luke abandoned this revision.
luke added a comment.
These test cases are actually correct, I've misread the `UNALIGNED` checks
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D154739/new/
https://reviews.llvm.org/D154739
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