[PATCH] D154625: [DemandedBits] Improve analysis of second shl operand.

[Nikita Popov via Phabricator via llvm-commits]

nikic requested changes to this revision.
nikic added a comment.
This revision now requires changes to proceed.

I don't really get what you're trying to do here, but this looks clearly incorrect to me. Shift operands aren't symmetrical, and the shift amount generally has to be fully demanded.



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Comment at: llvm/test/Analysis/DemandedBits/shl.ll:7
 ; CHECK-DAG:  DemandedBits: 0xf for %a in %shl = shl i32 %a, 4
-; CHECK-DAG:  DemandedBits: 0xffffffff for 4 in %shl = shl i32 %a, 4
+; CHECK-DAG:  DemandedBits: 0xf for 4 in %shl = shl i32 %a, 4
 ; CHECK-DAG:  DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8
----------------
This is saying that shift amounts `0x4` and `0xfffffff4` behave the same way in this operation, which is clearly not the case: The latter would return poison.


Repository:
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  https://reviews.llvm.org/D154625/new/

https://reviews.llvm.org/D154625