[PATCH] D154625: [DemandedBits] Improve analysis of second shl operand.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: nikic, RKSimon, arsenm.
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For SHL, the demanded bits are currently improved for the first operand
by also considering second operand. As we use the second operand to
restrict the range for the first operand, we can also use it to restrict
the range of the second operand.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154625

Files:
  llvm/lib/Analysis/DemandedBits.cpp
  llvm/test/Analysis/DemandedBits/shl.ll


Index: llvm/test/Analysis/DemandedBits/shl.ll
===================================================================
--- llvm/test/Analysis/DemandedBits/shl.ll
+++ llvm/test/Analysis/DemandedBits/shl.ll
@@ -4,7 +4,7 @@
 ; CHECK-LABEL: 'test_shl_const_amount_4'
 ; CHECK-DAG:  DemandedBits: 0xff for %shl = shl i32 %a, 4
 ; CHECK-DAG:  DemandedBits: 0xf for %a in %shl = shl i32 %a, 4
-; CHECK-DAG:  DemandedBits: 0xffffffff for 4 in %shl = shl i32 %a, 4
+; CHECK-DAG:  DemandedBits: 0xf for 4 in %shl = shl i32 %a, 4
 ; CHECK-DAG:  DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8
 ; CHECK-DAG:  DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8
 ;
@@ -17,7 +17,7 @@
 ; CHECK-LABEL: 'test_shl_const_amount_5'
 ; CHECK-DAG:  DemandedBits: 0xff for %shl = shl i32 %a, 5
 ; CHECK-DAG:  DemandedBits: 0x7 for %a in %shl = shl i32 %a, 5
-; CHECK-DAG:  DemandedBits: 0xffffffff for 5 in %shl = shl i32 %a, 5
+; CHECK-DAG:  DemandedBits: 0x7 for 5 in %shl = shl i32 %a, 5
 ; CHECK-DAG:  DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8
 ; CHECK-DAG:  DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8
 ;
@@ -32,7 +32,7 @@
 ; CHECK-DAG:  DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8
 ; CHECK-DAG:  DemandedBits: 0xff for %shl = shl i32 %a, 8
 ; CHECK-DAG:  DemandedBits: 0x0 for %a in %shl = shl i32 %a, 8
-; CHECK-DAG:  DemandedBits: 0xffffffff for 8 in %shl = shl i32 %a, 8
+; CHECK-DAG:  DemandedBits: 0x0 for 8 in %shl = shl i32 %a, 8
 ;
   %shl = shl i32 %a, 8
   %shl.t = trunc i32 %shl to i8
@@ -43,7 +43,7 @@
 ; CHECK-LABEL: 'test_shl_const_amount_9'
 ; CHECK-DAG:  DemandedBits: 0xff for %shl = shl i32 %a, 9
 ; CHECK-DAG:  DemandedBits: 0x0 for %a in %shl = shl i32 %a, 9
-; CHECK-DAG:  DemandedBits: 0xffffffff for 9 in %shl = shl i32 %a, 9
+; CHECK-DAG:  DemandedBits: 0x0 for 9 in %shl = shl i32 %a, 9
 ; CHECK-DAG:  DemandedBits: 0xff for %shl.t = trunc i32 %shl to i8
 ; CHECK-DAG:  DemandedBits: 0xff for %shl in %shl.t = trunc i32 %shl to i8
 ;
Index: llvm/lib/Analysis/DemandedBits.cpp
===================================================================
--- llvm/lib/Analysis/DemandedBits.cpp
+++ llvm/lib/Analysis/DemandedBits.cpp
@@ -171,23 +171,21 @@
     // left).
     AB = APInt::getLowBitsSet(BitWidth, AOut.getActiveBits());
     break;
-  case Instruction::Shl:
-    if (OperandNo == 0) {
-      const APInt *ShiftAmtC;
-      if (match(UserI->getOperand(1), m_APInt(ShiftAmtC))) {
-        uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1);
-        AB = AOut.lshr(ShiftAmt);
-
-        // If the shift is nuw/nsw, then the high bits are not dead
-        // (because we've promised that they *must* be zero).
-        const auto *S = cast<ShlOperator>(UserI);
-        if (S->hasNoSignedWrap())
-          AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
-        else if (S->hasNoUnsignedWrap())
-          AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
-      }
+  case Instruction::Shl: {
+    const APInt *ShiftAmtC;
+    if (match(UserI->getOperand(1), m_APInt(ShiftAmtC))) {
+      uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1);
+      AB = AOut.lshr(ShiftAmt);
+
+      // If the shift is nuw/nsw, then the high bits are not dead
+      // (because we've promised that they *must* be zero).
+      const auto *S = cast<ShlOperator>(UserI);
+      if (S->hasNoSignedWrap())
+        AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt + 1);
+      else if (S->hasNoUnsignedWrap())
+        AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
     }
-    break;
+  } break;
   case Instruction::LShr:
     if (OperandNo == 0) {
       const APInt *ShiftAmtC;


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