[PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n created this revision.
goldstein.w.n added reviewers: RKSimon, pengfei, nikic, arsenm, efriedma.
Herald added subscribers: StephenFan, steven.zhang, hiraditya.
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goldstein.w.n requested review of this revision.
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Note: This is moving D154678 <https://reviews.llvm.org/D154678> which previously implemented this in
InstCombine. Concerns where brought up that this was de-canonicalizing
and really targeting a codegen improvement, so placing in DAGCombiner.

This implements:

  (fmul C, (uitofp Pow2))
      -> (bitcast_to_FP (add (bitcast_to_INT C), Log2(Pow2) << mantissa))
  (fdiv C, (uitofp Pow2))
      -> (bitcast_to_FP (sub (bitcast_to_INT C), Log2(Pow2) << mantissa))

The motivation is mostly fdiv where 2^(-p) is a fairly common
expression.

The patch is intentionally conservative about the transform, only
doing so if we:

1. have IEEE floats
2. C is normal
3. add/sub of max(Log2(Pow2)) stays in the min/max exponent bounds.

Alive2 can't realistically prove this, but did test float16/float32
cases (within the bounds of the above rules) exhaustively.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154805

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

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