[PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 4 18:56:02 PDT 2023
realqhc added a comment.
In D153748#4472470 <https://reviews.llvm.org/D153748#4472470>, @craig.topper wrote:
> In D153748#4470438 <https://reviews.llvm.org/D153748#4470438>, @realqhc wrote:
>
>> In D153748#4467842 <https://reviews.llvm.org/D153748#4467842>, @kito-cheng wrote:
>>
>>> You might need to add extension in `RISCVISAInfo.cpp` for -march support?
>>
>> We plan to add extension to RISCVISAInfo.cpp in the second batch of upstreaming patches along with the LLVM Intrinsics for the extension.
>
> I think the assembler also needs to RISCVISAInfo.cpp changes to print the correct version for the ELF attributes to list what extensions are enabled in the binary.
Thanks for the suggesion, will get the versioning updated after discussion with core-v.
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