[PATCH] D154687: [RISCV] Narrow types of index operand matched pattern (shl (zext), C).

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10639
+
+  // Skip if NewElen is not narrower than the original extneded type.
+  if (NewElen >= N0.getValueType().getScalarSizeInBits())
----------------
extended*


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10648
+  SDValue NewShAmtVec =
+      DAG.getSplat(NewVT, DL, DAG.getTargetConstant(ShAmtV, DL, NewEltVT));
+  return DAG.getNode(ISD::SHL, DL, NewVT, NewExt, NewShAmtVec);
----------------
I don't think this should be a TargetConstant.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154687/new/

https://reviews.llvm.org/D154687