[PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs added a comment.

A couple more comments, then it looks good to me.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16384
 
+static SDValue performANDSETCCCombine(SDNode *N,
+                                      TargetLowering::DAGCombinerInfo &DCI) {
----------------
Some comments, about what transformation this function performs, would be useful.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16394
+    SDValue Cmp;
+    AArch64CC::CondCode AArch64CC;
+
----------------
Perhaps rename this to `CC`? It's already clear that it's an AArch64 condition code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152714/new/

https://reviews.llvm.org/D152714