[llvm] b4067de - [RISCV] Rename RVInstBitManipRII->CVInstBitManipRII since it belongs to XVendorCV. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 4 18:52:45 PDT 2023
Author: Craig Topper
Date: 2023-07-04T18:52:31-07:00
New Revision: b4067dee7b2a93653c45a3844b18472866c75146
URL: https://github.com/llvm/llvm-project/commit/b4067dee7b2a93653c45a3844b18472866c75146
DIFF: https://github.com/llvm/llvm-project/commit/b4067dee7b2a93653c45a3844b18472866c75146.diff
LOG: [RISCV] Rename RVInstBitManipRII->CVInstBitManipRII since it belongs to XVendorCV. NFC
This is consistent with the other classes in this file.
It avoids a possible name conflict with standard extensions or
other vendors in the future.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
index 60b0deb4907f1a..6cf16e9e3de7be 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
@@ -11,7 +11,7 @@
//===----------------------------------------------------------------------===//
let DecoderNamespace = "XCVbitmanip" in {
- class RVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
+ class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
string opcodestr, string argstr>
: RVInstI<funct3, OPC_CUSTOM_2, outs, ins, opcodestr, argstr> {
bits<5> is3;
@@ -21,7 +21,7 @@ let DecoderNamespace = "XCVbitmanip" in {
class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
Operand i3type = uimm5>
- : RVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
+ : CVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
(ins GPR:$rs1, i3type:$is3, uimm5:$is2),
opcodestr, "$rd, $rs1, $is3, $is2">;
@@ -49,7 +49,7 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
def CV_EXTRACTUR : CVBitManipRR<0b0011001, "cv.extractur">;
let Constraints = "$rd = $rd_wb" in {
- def CV_INSERT : RVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
+ def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
(ins GPR:$rd, GPR:$rs1, uimm5:$is3, uimm5:$is2),
"cv.insert", "$rd, $rs1, $is3, $is2">;
def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
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