[PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

Missing MIR parse/print tests



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:11370
+int ARMTargetLowering::getSPAdjustment(MachineInstr &MI) const {
+  const TargetInstrInfo *TII = Subtarget->getInstrInfo();
+
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Repository:
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  https://reviews.llvm.org/D154281/new/

https://reviews.llvm.org/D154281