[PATCH] D154445: [Mips] Fix argument lowering for illegal vector types (PR63608)

[Nikita Popov via Phabricator via llvm-commits]

nikic created this revision.
Herald added subscribers: StephenFan, atanasyan, jrtc27, hiraditya, arichardson, sdardis.
Herald added a project: All.
nikic requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The Mips MSA ABI requires that legal vector types are passed in scalar registers in packed representation. E.g. a type like `v16i8` would be passed as two `i64`.

The implementation attempts to do the same for illegal vectors with non-power-of-two element counts or non-power-of-two element types. However, the SDAG argument lowering code doesn't support this, and it is not easy to extend it to support this (we would have to deal with situations like passing v7i18 as two i64 values).

This patch instead opts to restrict the special argument lowering to only vectors with power-of-two elements and round element types. Everything else is lowered naively, that is by passing each element in promoted registers. This matches the general argument lowering, which also gives up on doing anything smart ones non-power-of-two vectors get involved.

Fixes https://github.com/llvm/llvm-project/issues/63608.


https://reviews.llvm.org/D154445

Files:
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/test/CodeGen/Mips/cconv/illegal-vectors.ll
  llvm/test/CodeGen/Mips/cconv/vector.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D154445.537088.patch
Type: text/x-patch
Size: 40033 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230704/7484f1c2/attachment-0001.bin>