The Week Of Monday 16 January 2023 Archives by thread
Starting: Mon Jan 16 00:06:36 PST 2023
Ending: Sun Jan 22 23:57:53 PST 2023
Messages: 2549
- [PATCH] D141576: [CodeGen] Prevent overlapping subregs in getCoveringSubRegIndexes
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D141129: [InstCombine] Use KnownBits for lshr/add -> (a + b < a)
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes in PtrReplacer
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D141693: [AArch64] turn extended vecreduce bigger than v16i8 into udot/sdot
Dave Green via Phabricator via llvm-commits
- [PATCH] D141691: [lld][COFF] Provide unwinding information for Chunk injected by /delayloaded
serge via Phabricator via llvm-commits
- [PATCH] D141692: [AArch64] Add tests for dotreduce to check for wider vectors.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 779df38 - [LoongArch] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [PATCH] D141700: AMDGPU: Move enqueued block handling into clang
Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
- [llvm] 676e22a - [WebAssembly] Remove redundant opaque pointers test (NFC)
Nikita Popov via llvm-commits
- [PATCH] D141825: [docs] Expand example on stand-alone builds.
Francesco Petrogalli via Phabricator via llvm-commits
- [llvm] 68a534e - [WebAssembly] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [PATCH] D141810: [LoopUnroll] Don't update DT for changeToUnreachable.
Nikita Popov via Phabricator via llvm-commits
- [llvm] 1e67d77 - Partially revert 931d04be2fc8
Benjamin Kramer via llvm-commits
- [PATCH] D141829: [AArch64] fold subs ugt/ult to ands when the second operand is a mask
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D141487: [LoopUnroll] Directly update DT instead of DTU.
Nikita Popov via Phabricator via llvm-commits
- [llvm] e18b971 - [AArch64][InstCombine] Simplify repeated complex patterns in dupqlane
Matt Devereau via llvm-commits
- [PATCH] D138203: [AArch64][InstCombine] Simplify repeated complex patterns in dupqlane
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D141823: [SCEV] More precise trip multiples
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D141657: [X86] Prefer fpext(splat(X)) to splat(fpext(x)).
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141074: [X86] Avoid converting 64-bit integers to floating point using x87 on Windows
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141830: Invalid alignment specification For NVPTX LowerFormalArguments
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D141606: [AArch64] Remove AES, SHA2, SHA3 and SM4 features from armv8.6-a+
Tamar Christina via Phabricator via llvm-commits
- [PATCH] D139010: [clang][WebAssembly] Implement support for table types and builtins
Paulo Matos via Phabricator via llvm-commits
- [llvm] 4e00806 - [SCEV][NFC] Make computeExitLimitFromCond public
Max Kazantsev via llvm-commits
- [PATCH] D141457: [SCEV][NFC] Make computeExitLimitFromCond public
Max Kazantsev via Phabricator via llvm-commits
- [llvm] 56ffd39 - [VPlan] Use VPDef prefix for VPDef IDs instead of VPRecipeBase (NFC).
Florian Hahn via llvm-commits
- [PATCH] D141834: [RISCV][NFC] Use uncompressInst to relax instructions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D140848: [VPlan] Remove duplicated VPValue IDs (NFCI).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D141835: [WebAssembly][NFC] Add pre-commit test for D140069
Luke Lau via Phabricator via llvm-commits
- [PATCH] D140069: [DAGCombiner] Scalarize vectorized loads that are splatted
Luke Lau via Phabricator via llvm-commits
- [llvm] 28de5f9 - [AArch64] Sink to umull if we know tops bits are zero.
David Green via llvm-commits
- [PATCH] D141275: [AArch64] Sink to umull if we know tops bits are zero.
Dave Green via Phabricator via llvm-commits
- [PATCH] D141791: [Thumb2][MVE] Recognise shuffle truncation patterns suitable for ARMISD::MVETRUNC
Dave Green via Phabricator via llvm-commits
- [PATCH] D134982: [X86] Add support for "light" AVX
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D141619: [GVN] Refactor handling of pointer-select in GVN pass
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D141836: [AArch64] Disable __muloti4 libcalls for AArch64
Sebastian Poeplau via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Max Kazantsev via Phabricator via llvm-commits
- [llvm] fc7cdaa - [GVN] Refactor handling of pointer-select in GVN pass
Sergey Kachkov via llvm-commits
- [PATCH] D141469: [AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D138132: [JumpThreading] Preserve profile metadata during select unfolding
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D141788: [NFC] Use `llvm::enumerate` in llvm/unittests/Object
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] 6387d38 - [AArch64][SME] Add an instruction mapping for SME pseudos
Kerry McLaughlin via llvm-commits
- [PATCH] D136856: [AArch64][SME] Add an instruction mapping for SME pseudos
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D138123: [Verifier][WinEH] Check funclet tokens on intrinsic calls that may lower to function calls
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D137944: [ObjC][ARC] Teach the OptimizeSequences step of ObjCARCOpts about WinEH funclet tokens
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D138958: [clang] Better UX for Clang’s unwind-affecting attributes
Nuno Lopes via Phabricator via llvm-commits
- [llvm] 82cee24 - [JumpThreading] Preserve profile metadata during select unfolding, take 2
Max Kazantsev via llvm-commits
- [llvm] 32d72bd - [AArch64] Add tests for dotreduce to check for wider vectors.
Zain Jaffal via llvm-commits
- [PATCH] D140559: [InlineAdvisor] Restructure advisor plugin unittest cmake
IBricchi via Phabricator via llvm-commits
- [llvm] 868abc4 - Revert "[GVN] Refactor handling of pointer-select in GVN pass"
Sergey Kachkov via llvm-commits
- [PATCH] D139933: [InlineOrder] Add TopDownInlineOrder
IBricchi via Phabricator via llvm-commits
- [PATCH] D140404: Patch for dbg variable instrinsics to point towards cloned values in JumpThreading
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D141679: [CodeGen][Dwarf] Generate global variable DIEs after all subprogram (and their abstract origin) DIEs
Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
- [llvm] a654971 - [LoopUnroll] Don't update DT for changeToUnreachable.
Florian Hahn via llvm-commits
- [PATCH] D141840: Deprecate MemIntrinsicBase::getDestAlignment() and MemTransferBase::getSourceAlignment()
Guillaume Chatelet via Phabricator via llvm-commits
- [llvm] 80bb57f - Deprecate Argument::getParamAlignment()
Guillaume Chatelet via llvm-commits
- [PATCH] D136233: [SimpleLoopUnswitch] Inject loop-invariant conditions and unswitch them when it's profitable
Max Kazantsev via Phabricator via llvm-commits
- [llvm] cb37cf6 - [NFC] Remove dead code
Guillaume Chatelet via llvm-commits
- [llvm] 8a0e0c2 - [NFC] Use `llvm::enumerate` in llvm/unittests/Object
Sergei Barannikov via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Kiran Chandramohan via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D131915: [MLIR][OpenMP] Added target data, exit data, and enter data operation definition for MLIR.
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D141842: [LoopVectorize] Enable integer Mul and Add as select reduction patterns
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D141048: [SelectionDAG] Add pcsections recursively on SDNode values
Martin Fink via Phabricator via llvm-commits
- [PATCH] D105013: [InstCombine] try to fold the expression "(A & ~B) + B" to "A | B"
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137085: [LLVM][TableGen] Add first tutorial notebook
David Spickett via Phabricator via llvm-commits
- [llvm] 2216ee4 - This patch allows llvm-dwarfutil to utilize accelerator tables
Alexey Lapshin via llvm-commits
- [PATCH] D139638: [llvm-dwarfutil] Add accelerator tables to dwarfutil
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference type externref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D140271: [NFCI][llvm-exegesis] Benchmark: parallelize codegen (5x ... 8x less wallclock)
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D141389: [DFSAN] Add support for strnlen, strncat, strsep, sscanf and _tolower
Tomasz Kuchta via Phabricator via llvm-commits
- [llvm] 537cdf9 - [llvm-objdump][RISCV] Use new common method to parse ARCH RISCV attribute
Anton Afanasyev via llvm-commits
- [PATCH] D139553: [llvm-objdump][RISCV] Use new common method to parse ARCH RISCV attribute
Anton Afanasyev via Phabricator via llvm-commits
- [PATCH] D135915: [ConstraintElim] Enable pass by default.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D139790: [VPlan] Consider all recipes in replicate blocks as sink candidates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D141806: [X86] `canonicalizeShuffleWithBinOps()`: support `VS[HR][LA]I` opcodes (unary shuffles only)
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 135f23d - Deprecate MemIntrinsicBase::getDestAlignment() and MemTransferBase::getSourceAlignment()
Guillaume Chatelet via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Denis Revunov via Phabricator via llvm-commits
- [llvm] 659e1b7 - [X86] Add more test case for folding select on vXi1
via llvm-commits
- [PATCH] D141653: [X86] Improve instruction ordering of constant `srl/shl` with `and` to get better and-masks
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141846: [AArch64] Allow poison elements of fixed-vectors to be duplicated as a widened element
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D141776: [X86] `X86TargetLowering`: override `allowsMemoryAccess()`
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Perform basic isnan combines on llvm.is.fpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D141848: [Test] Fix YAML mapping keys duplication. NFC.
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D141782: [X86] Don't fold select for vXi1 on X86 target.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D140474: [YAML IO] Check that mapping doesn't contain duplicating keys
Anton Sidorenko via Phabricator via llvm-commits
- [llvm] db711f7 - [X86] Prefer fpext(splat(X)) to splat(fpext(x)).
Freddy Ye via llvm-commits
- [PATCH] D141680: [GVN] Refactor findDominatingLoad function
Sergei Kachkov via Phabricator via llvm-commits
- [PATCH] D141849: [AArch64][SME2] Add SME2 outer product intrinsics
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D134719: [AArch64] Enable libm vectorized functions via SLEEF
Daniel Kiss via Phabricator via llvm-commits
- [PATCH] D141650: [VectorUtils] Enhance VFABI demangling API
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D141850: [SCEV] Preserve information in applyLoopGuards
Alon Kom via Phabricator via llvm-commits
- [llvm] 730c7a4 - [docs] Expand example on stand-alone builds.
Francesco Petrogalli via llvm-commits
- [PATCH] D141778: [DAGCombiner][X86] `mergeConsecutiveStores()`: support merging splat-stores of the same value
Roman Lebedev via Phabricator via llvm-commits
- [llvm] 5ab0894 - Explicitly more Error when returning it (NFC)
Mehdi Amini via llvm-commits
- [PATCH] D141852: [amdgpu] Change LDS lowering default to hybrid
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D140208: [AMDGPU] Improved wide multiplies
Jessica Del via Phabricator via llvm-commits
- [PATCH] D128440: [WebAssembly] Initial support for reference type funcref in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D140787: [DWARF][dsymutil][llvm-dwarfutil] Create a placeholder library DWARFLinkerNext
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D141853: [ARM] Accept shortened forms of the T2 ADC instruction
Jirui Wu via Phabricator via llvm-commits
- [PATCH] D141854: [Assignment Tracking] Fix invalidated iterator usage
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D139902: IR: Add nofpclass parameter attribute
Serge Pavlov via Phabricator via llvm-commits
- [llvm] cd8cac4 - [DebugInfo] Add CIE::getAugmentationData() and FDE::getCIEPointer()
Benjamin Maxwell via llvm-commits
- [PATCH] D141475: [DebugInfo] Add CIE::getAugmentationData() and FDE::getCIEPointer()
Benjamin Maxwell via Phabricator via llvm-commits
- [llvm] bc367dd - [Support] Fix REDEBUG compilation
Nikita Popov via llvm-commits
- [llvm] 9f1521b - [Support] Fix incorrect assertion in backref compilation
Nikita Popov via llvm-commits
- [PATCH] D141665: [DAGCombine][AArch64][ARM] Combine abd(sub(x, y)) to abd if the sub is nsw
Dave Green via Phabricator via llvm-commits
- [PATCH] D139549: [X86][ConstraintFP] Model `MXCSR` for function call
Serge Pavlov via Phabricator via llvm-commits
- [llvm] ce1aae4 - [AMDGPU][AsmParser][NFC] Refine defining single-bit custom operands.
Ivan Kosarev via llvm-commits
- [PATCH] D141301: [AMDGPU][AsmParser][NFC] Refine defining single-bit custom operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D141857: [AMDGPU] v_fmac_f64 encoding tests for gfx940
Mariusz Sikora via Phabricator via llvm-commits
- [PATCH] D140089: [MemCpyOpt] Add a stack-move optimization to opportunistically merge allocas together.
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D140841: [DWARFLinkerNext] Add StringPool class.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D129693: [ARM] Don't emit Arm speculation hardening thunks under Thumb and vice-versa
Dave Green via Phabricator via llvm-commits
- [llvm] 0f42221 - [AArch64] Move default extensions from clang Driver to TargetParser
David Green via llvm-commits
- [PATCH] D141518: [AArch64] Move default extensions from clang Driver to TargetParser
Dave Green via Phabricator via llvm-commits
- [PATCH] D119049: [LLD] Allow usage of LLD as a library
Zhuoran Yin via Phabricator via llvm-commits
- [PATCH] D140658: [AMDGPU] Enable IAS in the AMDGPU backend
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D140242: [AMDGPU] Modify adjustInliningThreshold to also consider the cost of passing function arguments through the stack
Janek van Oirschot via Phabricator via llvm-commits
- [lld] c512eda - [lld][COFF] Provide unwinding information for Chunk injected by /delayloaded
via llvm-commits
- [llvm] 625e666 - [InstCombine] add tests for signum (spaceship) variant; NFC
Sanjay Patel via llvm-commits
- [llvm] dedc58d - [InstCombine] canonicalize a signum (spaceship) that ends in add
Sanjay Patel via llvm-commits
- [PATCH] D141863: [llvm][APFloat] Add NaN-in-negative-zero formats by AMD and GraphCore
Krzysztof Drewniak via Phabricator via llvm-commits
- [llvm] f4f8f9f - [Thumb2][MVE] Recognise shuffle truncation patterns suitable for ARMISD::MVETRUNC
Simon Pilgrim via llvm-commits
- [PATCH] D141512: [SLP]Improve isGatherShuffledEntry by looking deeper through the reused scalars.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D141432: Add two additional float8 types to MLIR and APFloat.
Krzysztof Drewniak via Phabricator via llvm-commits
- [PATCH] D141722: Attributes: Check declarations for dereferenceable bytes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D140790: [MachineBasicBlock] Explicit FT branching param
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D141865: [llvm][GenericUniformity] Hack around strict is_invocable() checks
Krzysztof Drewniak via Phabricator via llvm-commits
- [llvm] cf47a8d - Silence signed/unsigned comparison warnings. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D141728: [AMDGPU] Tune scheduler on GFX10 and GFX11
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] 72290a3 - [AArch64] Add tests for forming abd from wrap flags and min/max. NFC
David Green via llvm-commits
- [PATCH] D141866: [llvm][NFC] Apply performance-noexcept-move-constructor to llvm core
Aaron Gokaslan via Phabricator via llvm-commits
- [PATCH] D141867: [mlir][vector] Share enums with the transform dialect
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D78810: [InstCombine] Check max alignment before adding attr on aligned_alloc
Chang Lin via Phabricator via llvm-commits
- [PATCH] D132261: [SLP]Do not reduce repeated values, use scalar red ops instead.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] ee7188c - [LoopInterchange] Correcting the profitability check
via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability check
Congzhe Cao via Phabricator via llvm-commits
- [PATCH] D141567: [Flang] [OpenMP] Refine parser restrictions for OMP TARGET UPDATE clauses.
Raghu via Phabricator via llvm-commits
- [PATCH] D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions
Michael Maitland via Phabricator via llvm-commits
- [llvm] ee559b2 - [P10] Fix the implementation for BRH
Lei Huang via llvm-commits
- [PATCH] D141697: [P10] Fix the implementation for BRH
Lei Huang via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Dave Green via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D141870: [DAG] Fold fadd(vecreduce(a), vecreduce(b)) into vecreduce(fadd(a,b))
Dave Green via Phabricator via llvm-commits
- [llvm] a288d7f - [llvm][ADT] Replace uses of `makeMutableArrayRef` with deduction guides
Joe Loser via llvm-commits
- [PATCH] D141814: [llvm][ADT] Replace uses of `makeMutableArrayRef` with deduction guides
Joe Loser via Phabricator via llvm-commits
- [PATCH] D141872: [llvm][ADT] Mark `makeMutableArrayRef` as deprecated
Joe Loser via Phabricator via llvm-commits
- [PATCH] D133713: [Support] Introduce ThreadSafeAllocator
Joe Loser via Phabricator via llvm-commits
- [PATCH] D141747: Resolve a FIXME in MachineCopyPropagation by allowig propagation to subregister uses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D132084: [Cloning] handle blockaddress array clone in the same module
Matt Arsenault via Phabricator via llvm-commits
- [llvm] a1551fd - FastISel: remove EH_LABEL skipping code.
James Y Knight via llvm-commits
- [llvm] 52f6ed0 - Move Personalities array from MachineModuleInfo to DwarfCFIException.
James Y Knight via llvm-commits
- [PATCH] D141652: [X86] Add additional tests for constant `srl/shl` + `and`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141874: Add tests for reoredering (shift (add (shift x, C0), y), C1); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141875: [InstCombine] Reorder (shl (add (shl x, C0), y), C1) -> (add (shl x, C0 + C1), (shl y, C1))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141875: [InstCombine] Reorder (shl (add (shl x, C0), y), C1) -> (add (shl x, C0 + C1), (shl y, C1))
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D141875: [InstCombine] Reorder (shl (add (shl x, C0), y), C1) -> (add (shl x, C0 + C1), (shl y, C1))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141875: [InstCombine] Reorder (shl (add (shl x, C0), y), C1) -> (add (shl x, C0 + C1), (shl y, C1))
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D140849: [Patch 1/4]: Add tests for binops with conditions/assume constraints
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141876: [AMDGPU] Tune scheduler on GFX10 and GFX11 for regions with spilling
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store
Ting Wang via Phabricator via llvm-commits
- [llvm] 159cac5 - [X86] Don't fold select for vXi1 on X86 target.
via llvm-commits
- [PATCH] D141806: [X86] `canonicalizeShuffleWithBinOps()`: support `VS[HR][LA]I` opcodes
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D141877: [NFC][X86] `canonicalizeShuffleWithBinOps()`: refactor and generalize, NFC
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D139163: Utils: Add utility pass to lower ifuncs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D141806: [X86] `canonicalizeShuffleWithBinOps()`: support `VS[HR][LA]I` opcodes, unary shuffles part
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D141878: [X86] `canonicalizeShuffleWithBinOps()`: support `VS[HR][LA]I` opcodes, binary shuffles part
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D141879: [X86] Add register definitions for cfi directives
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Bill Wendling via Phabricator via llvm-commits
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Craig Topper via llvm-commits
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Rahman Lavaee via llvm-commits
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Florian Mayer via llvm-commits
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- [PATCH] D141984: [RISCV][MC] Add support for experimental zfa extension(FLI instruction not included)
Jun Sha via Phabricator via llvm-commits
- [llvm] d0942df - [AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
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Matt Arsenault via llvm-commits
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Noah Goldstein via Phabricator via llvm-commits
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Noah Goldstein via Phabricator via llvm-commits
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Noah Goldstein via Phabricator via llvm-commits
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- [PATCH] D141988: [llvm] Fix bug in DemoteRegToStack where DenseMap is not used
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- [llvm] 51b941d - [gn build] Manually port e022ca8
Arthur Eubanks via llvm-commits
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- [llvm] 93831d6 - [gn build] Port 28b6f38d0a84
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- [PATCH] D141989: [InstCombine] Add tests for ctpop(X) where X is a power of 2; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D141990: [InstCombine] Add transform ctpop(X) -> 1 iff X is non-zero power of 2
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D37626: [ELF] Scan .eh_frame sections precisely in order to eliminate unused LSDAs and personality routines.
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Alon Kom via Phabricator via llvm-commits
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- [PATCH] D141993: [CodeGen][WIP] Split some functionality from DetectDeadLanes into its own class to be reused. NFCi
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- [PATCH] D141995: [CSKY] Fix errors caused by change of compressInst
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- [llvm] 4afedbd - [LowerIFunc] Remove typed pointer test (NFC)
Nikita Popov via llvm-commits
- [llvm] 6a60a68 - [AMDGPU] Precommit test for D141576
Pierre van Houtryve via llvm-commits
- [llvm] fd33001 - [CodeGen] Prevent overlapping subregs in getCoveringSubRegIndexes
Pierre van Houtryve via llvm-commits
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- [llvm] 610abe8 - Revert "[BitcodeReader] Allow reading pointer types from old IR"
Nikita Popov via llvm-commits
- [llvm] 48c2172 - Revert "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"
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Nikita Popov via llvm-commits
- [llvm] fff6964 - [Release] Produce mlir tarball
Nikita Popov via llvm-commits
- [llvm] e4abfc4 - [CSKY] Fix errors caused by change of compressInst
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- [PATCH] D140542: [MachineCombiner] Support local strategy for traces
Anton Sidorenko via Phabricator via llvm-commits
- [llvm] ebfb1dd - [gn build] Port 48c2172e51b2
LLVM GN Syncbot via llvm-commits
- [llvm] 544e029 - Fix typo. NFC
Diana Picus via llvm-commits
- [llvm] 0a85c53 - [GlobalISel] Detect splats built with G_CONCAT_VECTORS
Diana Picus via llvm-commits
- [llvm] 855beb1 - [LTO] Always use opaque pointers mode from config
Nikita Popov via llvm-commits
- [PATCH] D141074: [X86] Avoid converting u64 to f32 using x87 on Windows
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] e26ec33 - [DAG][AArch64][ARM] Combine abd(sub(x, y)) to abd if the sub is nsw
David Green via llvm-commits
- [llvm] 4756f9a - [LLVMContext] Remove hasSetOpaquePointersValue() API (NFC)
Nikita Popov via llvm-commits
- [PATCH] D142000: [AArch64][SME2] Add LLVM IR intrinsics for the vertical dot products
David Sherwood via Phabricator via llvm-commits
- [llvm] 98b9340 - [RISCV][NFC] Add test cases for rounding vfcvt
Luke Lau via llvm-commits
- [llvm] a0d80c2 - [RISCV] Generalize performFP_TO_INTCombine to vectors
Luke Lau via llvm-commits
- [PATCH] D142003: [llvm-objdump] Fix reporting error for processing target features
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D142004: [AArch64][SME2] Add multi-vector multiply-add long intrinsics.
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D138323: [TableGen] RegisterInfo backend - Add abstraction layer between code generation logic and syntax output
Nicolai Hähnle via Phabricator via llvm-commits
- [llvm] 45299fb - Reapply [AArch64] fold subs ugt/ult to ands when the second operand is mask/pow2
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- [llvm] 3ed58d4 - AArch64: allocate small fixed args properly in varargs functions.
Tim Northover via llvm-commits
- [llvm] 21df504 - [DAG][ARM][AArch64] Transform max(a, b) - min(a, b) -> abd(a,b)
David Green via llvm-commits
- [PATCH] D141706: [DAG][ARM][AArch64] Transform max(a, b) - min(a,b) -> abd(a,b)
Dave Green via Phabricator via llvm-commits
- [llvm] 73cdbbe - [DAG] combineInsertEltToShuffle - split off mergeInsertEltWithShuffle fold. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D142007: [NFC] Fix "form/from" typos
Piotr Fusik via Phabricator via llvm-commits
- [llvm] 9936064 - Remove an unused variable, NFC
Haojian Wu via llvm-commits
- [llvm] 3cba33c - [RISCV][ISelLowering] Fix select lowering issue
Anton Sidorenko via llvm-commits
- [llvm] f615de7 - [VPlan] Replace VPBranchOnMaskSC::classof with VP_CLASSOF_IMPL. (NFC)
Florian Hahn via llvm-commits
- [llvm] c33b939 - [BitcodeReader] Allow reading pointer types from old IR
Sebastian Neubauer via llvm-commits
- [PATCH] D142009: GlobalISel: Split main function of RegBankSelect up
Matt Arsenault via Phabricator via llvm-commits
- [llvm] f10d452 - Reland "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"
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- [llvm] 60b9897 - [gn build] Port f10d452db841
LLVM GN Syncbot via llvm-commits
- [llvm] c2ab7e2 - [InstCombine] simplify code for matching shift-logic-shift pattern; NFC
Sanjay Patel via llvm-commits
- [llvm] f81151e - [InstCombine] add tests for diff-of-squares; NFC
Sanjay Patel via llvm-commits
- [PATCH] D140513: [VPlan] Switch default graph traits to be recursive, update VPDomTree.
Ayal Zaks via Phabricator via llvm-commits
- [llvm] 32af267 - [NFC][WebAssembly] Add tests
Samuel Parker via llvm-commits
- [llvm] 31ee6ae - [llvm-objdump] Fix reporting error for processing target features
Anton Afanasyev via llvm-commits
- [PATCH] D142012: [ReleaseNotes] Adds mention of complex number support for ARM and AArch64 backends.
Nicholas Guy via Phabricator via llvm-commits
- [llvm] 22c9f4c - [VPlan] Replace VPInterleaveRecipe::classof with VP_CLASSOF_IMPL. (NFC)
Florian Hahn via llvm-commits
- [PATCH] D70676: [DebugInfo] Don't repeatedly created undef DBG_VALUEs during machine-sinking
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D69178: [DebugInfo] Use DBG_VALUEs IsIndirect field for describing stack spills
Jeremy Morse via Phabricator via llvm-commits
- [llvm] 695ce48 - Revert "[ConstraintElim] Enable pass by default."
Florian Hahn via llvm-commits
- [PATCH] D142015: [LV] Plan with and without FoldTailByMasking
Dave Green via Phabricator via llvm-commits
- [llvm] ae0c232 - [Regex] Check two chars in step back optimization (NFC)
Nikita Popov via llvm-commits
- [PATCH] D141279: [DebugInfo][CSInfo] Avoid using clobbered registers as call-site argument locations
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- [PATCH] D142017: [AMDGPU] Add feature predicate for v_fmac_f64 instruction
Mariusz Sikora via Phabricator via llvm-commits
- [llvm] feee22d - [VPlan] Disconnect VPRegionBlock from successors in graph iterator(NFCI)
Florian Hahn via llvm-commits
- [PATCH] D142019: ARM: skip debug instructions when matching jump-table patterns.
Tim Northover via Phabricator via llvm-commits
- [llvm] f845076 - [StatepointLowering] Move statepoint correctness checks to Verifier. NFC.
Denis Antrushin via llvm-commits
- [llvm] eb42b67 - [InstCombine][InstSimplify] add tests for i1/i2 mul with no-wrap; NFC
Sanjay Patel via llvm-commits
- [llvm] 830ac67 - [InstCombine] reduce code duplication in visitSub(); NFC
Sanjay Patel via llvm-commits
- [PATCH] D142020: AMDGPU: Partially fix machine uniformity for inline asm
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142021: AMDGPU/GlobalISel: Add stub custom regbankselect pass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137504: [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D130487: [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D141603: [AArch64][SME] Allow predicate-as-counter operands for psel
Caroline via Phabricator via llvm-commits
- [llvm] 1720ec6 - [InstCombine] restrict no-wrap propagation for i1/i2 to avoid miscompiles
Sanjay Patel via llvm-commits
- [PATCH] D141387: [DebugInfo] Store instr-ref/DBG_VALUE mode of a MachineFunction in a member variable
Jeremy Morse via Phabricator via llvm-commits
- [llvm] 3af113f - [Assignment Tracking] Replace metadata number with variable capture in tests
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- [llvm] 7460842 - [DAGCombiner] `combineShuffleOfSplatVal()`: don't assert that shuffle is non-undef
Roman Lebedev via llvm-commits
- [PATCH] D139209: [IRMover] Remove UB implying parameter attributes when necessary
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- [PATCH] D132458: [LoopVectorize] Synthesize mask operands for vector variants as needed
Graham Hunter via Phabricator via llvm-commits
- [PATCH] D142025: [AArch64][SME2] Add multi-vector FP convert from Float to interleave Half/BFloat intrinsic
Caroline via Phabricator via llvm-commits
- [PATCH] D142026: Optimize OptTable::findNearest implementation and usage
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- [PATCH] D142027: [Assignment Tracking][NFC] Replace LLVM command line option with a new module flag
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- [PATCH] D133949: Make sure the right parameter extension attributes are added in various instrumentation passes.
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- [PATCH] D142031: [AArch64][SME2] Add intrinsics to move multi-vectors to/from ZA.
Kerry McLaughlin via Phabricator via llvm-commits
- [PATCH] D131052: [CMake] Allow setting the location of host tools with LLVM_NATIVE_TOOL_DIR
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D142032: [AArch64][SME2] Add multi-vector convert to/from floating-point intrinsic
Caroline via Phabricator via llvm-commits
- [PATCH] D142035: [AArch64][SME2] Add Multi-vector saturating extract narrow intrinsics
Caroline via Phabricator via llvm-commits
- [PATCH] D141431: [AArch64] FEAT_LRCPC3 load/store optimisations
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D141429: [AArch64] Codegen for FEAT_LRCPC3
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D142037: [RISCV] Make it explicit that attributes use the MCSubtargetInfo from TargetMachine.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D141406: [AArch64] Codegen for FEAT_LSE128
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D142038: [X86] canonicalizeShuffleWithBinOps - add handling of SSE vector shift nodes
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- [PATCH] D136031: [DirectX backend] support ConstantBuffer to DXILResource.h
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- [PATCH] D111456: [InlineCost] model calls to llvm.objectsize.*
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] 0246c5d - [NFC] Release Note for D138995
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- [PATCH] D142041: [RISCV] Use TargetMachine MCSubtargetInfo in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.
Craig Topper via Phabricator via llvm-commits
- [llvm] 1378e7d - [InstSimplify] add no-wrap parameters to simplifyMul and add more tests; NFC
Sanjay Patel via llvm-commits
- [PATCH] D140160: [llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D140180: [llvm] add CallBrPrepare pass to pipelines
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D141989: [InstSimplify] Add tests for ctpop(X) where X is a power of 2; NFC
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- [PATCH] D141990: [InstSimplify] Add transform ctpop(X) -> 1 iff X is non-zero power of 2
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142044: [RISCV] Use canonical move instruction in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D139861: [llvm] boilerplate for new callbrprepare codegen IR pass
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139872: [llvm][CallBrPrepare] split critical edges
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139883: [llvm][CallBrPrepare] add llvm.callbr.landingpad intrinsic
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D139970: [llvm][CallBrPrepare] use SSAUpdater to use intrinsic value
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- [llvm] 1ce0617 - [InstSimplify] reduce "mul nsw i1" to "false"
Sanjay Patel via llvm-commits
- [PATCH] D141744: [Clang] Add lifetimebound attribute to std::move/std::forward
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D142047: [analyzer] Fix static code analysis concerns
Arvind Sudarsanam via Phabricator via llvm-commits
- [PATCH] D140908: [MemProf] Context disambiguation cloning pass [patch 1/3]
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- [compiler-rt] 8565e83 - [hwasan] add pattern for short tag in symbolizer
Florian Mayer via llvm-commits
- [PATCH] D139774: [libclang] Add API to set temporary directory location
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- [PATCH] D141451: [clang] report inlining decisions with -Wattribute-{warning|error}
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] 9778802 - [RISCV] Make it explicit that attributes use the MCSubtargetInfo from TargetMachine. NFC
Craig Topper via llvm-commits
- [PATCH] D142037: [RISCV] Make it explicit that attributes use the MCSubtargetInfo from TargetMachine. NFC
Craig Topper via Phabricator via llvm-commits
- [llvm] 82fa51f - [RISCV] Use TargetMachine MCSubtargetInfo in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.
Craig Topper via llvm-commits
- [llvm] 97cb619 - [RISCV] Use canonical move instruction in RISCVAsmPrinter::EmitHwasanMemaccessSymbols.
Craig Topper via llvm-commits
- [PATCH] D111272: [InlineCost] model calls to llvm.is.constant* more carefully
Eric Christopher via Phabricator via llvm-commits
- [PATCH] D137800: [llvm-driver] Reinvoke clang as described by llvm driver extra args
Alex Brachet via Phabricator via llvm-commits
- [llvm] 5d98dc7 - [llvm][GenericUniformity] Hack around strict is_invocable() checks
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- [PATCH] D142051: [AMDGPU] Introduce separate register limit bias in scheduler
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- [PATCH] D141020: [X86][ABI] Clobber %RAX for preserve_allcc and preserve_mostcc CCs
Anton Bikineev via Phabricator via llvm-commits
- [PATCH] D141785: [Clang][LoongArch] Implement patchable function entry
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- [PATCH] D141777: [X86] Reenable store merging post-legalization
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- [llvm] 1136cf1 - [SystemZ] Implement lowering of GET_ROUNDING
Jonas Paulsson via llvm-commits
- [PATCH] D140988: [SystemZ] Implement lowering of GET_ROUNDING
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D142054: [TableGen] Add high level DecoderEmitter documentation.
Rot127 via Phabricator via llvm-commits
- [PATCH] D142055: [VPlan] Add vp_depth_first_deep (NFC)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D139794: [BOLT][NFC] DataAggregator code cleanup
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- [PATCH] D141733: [BOLT][NFC] Replace ambiguous BinarySection::isReadOnly with isWritable
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- [llvm] d3da906 - [CMake] Allow setting the location of host tools with LLVM_NATIVE_TOOL_DIR
Martin Storsjö via llvm-commits
- [PATCH] D142058: [llvm][DiagnosticInfo] handle function pointer casts
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- [PATCH] D141727: [profile][test][NFC] Simplify test code for prof_avoid_relocs
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D140811: [DAGCombiner][X86] `visitVECTOR_SHUFFLE()`: splats with a single non-undef element are not splats
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- [PATCH] D132089: [BOLT][NFC] Simplify handleRelocation
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Kirill Stoimenov via llvm-commits
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Fred Riss via llvm-commits
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Lang Hames via llvm-commits
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Kirill Stoimenov via llvm-commits
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- [llvm] 8d498e0 - [gn] port a033dbbe5c43 (clang-stat-cache)
Nico Weber via llvm-commits
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- [llvm] 83d56fb - Drop the ZeroBehavior parameter from countLeadingZeros and the like (NFC)
Kazu Hirata via llvm-commits
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- [PATCH] D142084: [X86][MemFold] Upgrade the mechanism of auto-generated Memory Folding Table 1. Align ManualMapSet with X86MemoryFoldTableEntry instead of using UnfoldStrategy 2. ManualMapSet able to update the existing record in auto-generated MemFold table
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- [llvm] a6e3027 - [X86] Avoid converting u64 to f32 using x87 on Windows
Craig Topper via llvm-commits
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Masahiro ARAKAWA via Phabricator via llvm-commits
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Yingchi Long via llvm-commits
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Caroline via Phabricator via llvm-commits
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Quentin Colombet via llvm-commits
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Yingchi Long via Phabricator via llvm-commits
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Quentin Colombet via llvm-commits
- [llvm] 871815e - [AArch64][SVE2p1] Add SVE2.1 while (predicate-pair) intrinsics
David Sherwood via llvm-commits
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Ayal Zaks via Phabricator via llvm-commits
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Sam Parker via Phabricator via llvm-commits
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Ben Shi via Phabricator via llvm-commits
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Nikita Popov via llvm-commits
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Quentin Colombet via Phabricator via llvm-commits
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Dinar Temirbulatov via Phabricator via llvm-commits
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Luke Lau via Phabricator via llvm-commits
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- [llvm] bf4140c - [AMDGPU] Add feature predicate for v_fmac_f64 instruction
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Florian Hahn via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 08a - Memory Management
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- [llvm] 2826869 - [DAG] Do not combine any_ext when we combine and into zext.
Amaury Séchet via llvm-commits
- [PATCH] D139034: [IR] GEP: Fix byte-offsets in vectors of overaligned types
Jannik Silvanus via Phabricator via llvm-commits
- [llvm] 786cb15 - [SPIR-V] Add -opaque-pointers=0 to some LIT tests
Michal Paszkowski via llvm-commits
- [llvm] 6ad1b40 - Optimize OptTable::findNearest implementation and usage
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- [PATCH] D136344: [ELF][RISCV] Merge `.riscv.attributes` sections
Elena Lepilkina via Phabricator via llvm-commits
- [llvm] 7e5681c - [DAG] Peek through ZEXT/TRUNC in foldAddSubMasked1
Amaury Séchet via llvm-commits
- [llvm] e741b8c - [llvm][ir] Purge MD_prof custom accessors
Christian Ulmann via llvm-commits
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- [llvm] d3ae856 - [gn] port 939dce12f9f3 (clangd uses include-cleaner)
Nico Weber via llvm-commits
- [PATCH] D142106: [runtimes build] Pass on RUNTIMES_<target>_... options when using runtime_default_target
David Spickett via Phabricator via llvm-commits
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Ayke via Phabricator via llvm-commits
- [llvm] 77529ea - [gn] port 939dce12f9f3 (clangd uses include-cleaner) more
Nico Weber via llvm-commits
- [PATCH] D125784: [llvm-debuginfo-analyzer] 09 - CodeView Reader
Carlos Alberto Enciso via Phabricator via llvm-commits
- [llvm] 67bd3c5 - [X86] Add register definitions for cfi directives
Alex Brachet via llvm-commits
- [PATCH] D127581: [ELF] Relax R_RISCV_ALIGN
Luís Marques via Phabricator via llvm-commits
- [PATCH] D141752: [AVR] Fix an issue of writing 16-bit ports
Ayke via Phabricator via llvm-commits
- [PATCH] D142109: [LoopVectorize] Remove runtime check and scalar tail loop when tail-folding.
Sander de Smalen via Phabricator via llvm-commits
- [llvm] 4ace72e - [InstCombine] Add tests for freeze with !range and !align metadata (NFC)
Nikita Popov via llvm-commits
- [llvm] 2bcedd4 - [SPIR-V] Emit OpExecutionMode ContractionOff for no FP_CONTRACT metadata
Michal Paszkowski via llvm-commits
- [PATCH] D141264: [AVR] Fix incorrect expansion of pseudo instructions LPMWRdZ/ELPMWRdZ
Ayke via Phabricator via llvm-commits
- [llvm] 0c2630b - [InstCombine] Drop incorrect test (NFC)
Nikita Popov via llvm-commits
- [PATCH] D142114: [AArch64][SME2] Add Multi-vector add/sub, storing into ZA intrinsic
Caroline via Phabricator via llvm-commits
- [llvm] adcc90a - [InstCombine] Add non-logical variants for some ctpop and/or tests (NFC)
Nikita Popov via llvm-commits
- [PATCH] D140861: llvm-reduce: Only disable crash reports in the child
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142115: [ValueTracking] Take poison-generating metadata into account (PR59888)
Nikita Popov via Phabricator via llvm-commits
- [llvm] ee700de - [AArch64] Armv9-A implies FP16
David Green via llvm-commits
- [PATCH] D142116: [Cost] Add CostKind to getVectorInstrCost and its related users
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D142119: [GlobalISel] Enable patterns with multiple output operands for the GlobalISelEmitter
Rémi SEGARD via Phabricator via llvm-commits
- [PATCH] D142120: [PowerPC] Fix float materialization patterns.
Stefan Pintilie via Phabricator via llvm-commits
- [llvm] 9c0f957 - [InstCombine] Add test for load type conversion with !noundef (NFC)
Nikita Popov via llvm-commits
- [llvm] b3b049a - [Local] Preserve noundef metadata in copyMetadataForLoad()
Nikita Popov via llvm-commits
- [PATCH] D142122: [SVE][InstrFormats] Explcitly set hasSideEffects for all SVE instructions.
Paul Walker via Phabricator via llvm-commits
- [llvm] 48df06f - [AArch64] Allow poison elements of fixed-vectors to be duplicated as a widened element
Matt Devereau via llvm-commits
- [llvm] 72dc033 - [SROA] Check TBAA metadata in tests (NFC)
Nikita Popov via llvm-commits
- [PATCH] D142127: [llvm][codegen] Fix non-determinism in StackFrameLayoutAnalysisPass output
Paul Kirth via Phabricator via llvm-commits
- [llvm] c85cecf - [gn build] Port 22e8525dfdd7
LLVM GN Syncbot via llvm-commits
- [PATCH] D140787: [DWARF][dsymutil][llvm-dwarfutil] Create a placeholder library DWARFLinkerParallel.
Jonas Devlieghere via Phabricator via llvm-commits
- [llvm] a0f8bdb - [lit] Stop supporting triple substrings in UNSUPPORTED and XFAIL
Paul Robinson via llvm-commits
- [PATCH] D141439: [AARCH64][SVE] Do not optimize vector conversions
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- [llvm] a9c5a98 - [SystemZ] Improvement in tryRxSBG().
Jonas Paulsson via llvm-commits
- [llvm] 3e6afa7 - [CostModel][AArch64] Precommit tests for LD1 single-element to lane. NFC.
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LLVM GN Syncbot via llvm-commits
- [PATCH] D141602: [TTI][AArch64] Cost model insertelement and indexed LD1 instructions
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- [PATCH] D142132: [AArch64] Map DestructiveTernaryCommWithRev intrinsics to pesudo instructions
lizhijin via Phabricator via llvm-commits
- [llvm] 2f8b920 - Revert "[lit] Stop supporting triple substrings in UNSUPPORTED and XFAIL"
Paul Robinson via llvm-commits
- [PATCH] D142135: [AArch64] Basic target("+crypto") handling
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- [PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly
Craig Topper via Phabricator via llvm-commits
- [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR
Craig Topper via Phabricator via llvm-commits
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David Carlier via llvm-commits
- [llvm] d0907ce - [LoopUnroll] Directly update DT instead of DTU.
Florian Hahn via llvm-commits
- [compiler-rt] 1f3f3c0 - Revert "Reland [pgo] Avoid introducing relocations by using private alias"
Arthur Eubanks via llvm-commits
- [llvm] 117ecdd - [IRLinker] Replace CallInstr with CallBase
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- [PATCH] D142144: [RISCV][Driver] Add -rvv-vector-bits= option similar to -sve-vector-bits=
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- [llvm] 63e7e9c - [AMDGPU] Treat WMMA the same as MFMA for sched_barrier
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Noah Goldstein via llvm-commits
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Noah Goldstein via llvm-commits
- [llvm] 176a082 - [opt] Fix static code analysis concerns
Arthur Eubanks via llvm-commits
- [PATCH] D139827: [RISCV][Asan] Use dynamic shadow offset to make it work on different width of virtual-memory system.
Shabnam via Phabricator via llvm-commits
- [llvm] af9a452 - [llvm][codegen] Fix non-determinism in StackFrameLayoutAnalysisPass output
Paul Kirth via llvm-commits
- [llvm] e2c43a5 - [VPlan] Add vp_depth_first_deep (NFC)
Florian Hahn via llvm-commits
- [PATCH] D133340: [PowerPC][GISel]select floating point constant from TOC
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- [PATCH] D142156: llvm-reduce: Reorganize some function locations
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- [llvm] 725a21b - Reland "[lit] Stop supporting triple substrings in UNSUPPORTED and
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- [PATCH] D141553: [bazel] Enable layering_check for llvm and clang
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- [llvm] 9bdcf87 - [SLP]Improve isGatherShuffledEntry by looking deeper through the reused scalars.
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- [llvm] cf12709 - Revert "[Clang] Give Clang the ability to use a shared stat cache"
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- [llvm] 1f08d3b - [AMDGPU] Further reduce attaching of implicit operands to spills
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- [PATCH] D142161: [LegacyDivergenceAnalysis] Add NewPM support
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- [PATCH] D142166: [X86] In `shouldExpandLogicAtomicRMWInIR` return `CmpXChg` instead of asserting if we don't match op(0)
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- [llvm] c5ea42b - Revert "[LoopUnroll] Directly update DT instead of DTU."
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Nico Weber via llvm-commits
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- [llvm] a6000c1 - llvm-reduce: Account for aliases and ifuncs in IR complexity score
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- [llvm] 0782d97 - llvm-reduce: Account for initializer complexity
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- [llvm] 33ff9d9 - llvm-reduce: Fix typo in help text
Matt Arsenault via llvm-commits
- [PATCH] D142168: [mlgo] Stream the training data
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- [llvm] c919ea5 - [AVR] Fix incorrectly printed global symbol operands in inline-asm
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- [PATCH] D142170: [AVR][NFC] Refactor 'AVRAsmPrinter::PrintAsmOperand'
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- [PATCH] D141655: [LLVM][OpenMP] Correct the function signature of `__kmpc_parallel_level`
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- [compiler-rt] 6c48540 - Adding missing colon
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- [PATCH] D142166: [X86] Make `shouldExpandLogicAtomicRMWInIR` able to match both operands.
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- [llvm] 71283fd - [gn build] Port b40a3d73dc9c
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- [llvm] f37614b - [llvm] Move bit counting functions to bit.h (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D142176: [libunwind] On Darwin, add a callback-based lookup scheme for JIT'd unwind info.
Lang Hames via Phabricator via llvm-commits
- [llvm] 1692dff - Revert "[X86] Avoid converting u64 to f32 using x87 on Windows"
Craig Topper via llvm-commits
- [PATCH] D142178: [X86][WIP] Change precision control to FP80 during u64->fp32 conversion on Windows.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142179: [ADT] Add bit_floor, bit_ceil, and bit_width to bit.h
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- [PATCH] D142179: [ADT] Add bit_floor, bit_ceil, and bit_width to bit.h
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- [PATCH] D142179: [ADT] Add bit_floor, bit_ceil, and bit_width to bit.h
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- [PATCH] D142179: [ADT] Add bit_floor, bit_ceil, and bit_width to bit.h
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- [PATCH] D142179: [ADT] Add bit_floor, bit_ceil, and bit_width to bit.h
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- [PATCH] D142232: Increase inline threshold multiplier to 11 in nvptx backend.I used https://github.com/zjin-lcf/HeCBench (with nvcc usage swapped to clang++), which is an adaptation of the classic Rodinia benchmarks aimed at CUDA and SYCL programming models, to...
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- [llvm] 1eecf03 - [X86] `LowerBUILD_VECTOR()`: fix all-UNDEF detection
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- [PATCH] D138135: [ELF] Support LoongArch
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- [llvm] c972e1c - [X86] v8i1-masks.ll - add avx512 test coverage and use X86 check prefix instead of X32
Simon Pilgrim via llvm-commits
- [PATCH] D142282: [Support] Implement findModulesAndOffsets on Apple 64-bit platforms
Luís Marques via Phabricator via llvm-commits
- [PATCH] D142283: [Support] Make llvm-symbolizer runs for stack traces work on Apple platforms
Luís Marques via Phabricator via llvm-commits
- [llvm] 0b432df - [X86] Add DAG tests showing the failure to reassociate IMINMAX nodes to fold constant operands
Simon Pilgrim via llvm-commits
- [PATCH] D142284: [DAG] Enable reassociate for SMAX/SMIN/UMAX/UMIN nodes
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] fb40c34 - [VPlan] Consider all recipes in replicate blocks as sink candidates.
Florian Hahn via llvm-commits
- [llvm] 42afa16 - [AArch64] Simplify isSeveralBitsExtractOpFromShr (NFC)
Kazu Hirata via llvm-commits
- [llvm] d8ba9e5 - [ARM] Cortex-M55 Scheduling Model
David Green via llvm-commits
- [PATCH] D141523: [ARM] Cortex-M55 Scheduling Model
Dave Green via Phabricator via llvm-commits
- [llvm] 8d929d1 - [DAG] Convert static combineABSToABD to DAGCombiner::foldABSToABD. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 8666c20 - [RISCV] Use llvm::bit_width (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D142288: [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D142289: [NFC][TLI] Remove trailing whitespace from comment
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 8885420 - [NFC][SCEV] `computeSCEVAtScope()`: clang-format
Roman Lebedev via llvm-commits
- [llvm] f8eeeff - [NFC][SCEV] Reflow `computeSCEVAtScope()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] 4b4e3fb - [NFC][SCEV] `computeSCEVAtScope()`: `scUnknown`: use early-returns
Roman Lebedev via llvm-commits
- [llvm] 898fcfa - [NFC][SCEV] `computeSCEVAtScope()`: reserve vector size upfront
Roman Lebedev via llvm-commits
- [llvm] 005173c - [X86] `X86TargetLowering`: override `allowsMemoryAccess()`
Roman Lebedev via llvm-commits
- [llvm] 5638156 - [llvm] Use llvm::bit_width (NFC)
Kazu Hirata via llvm-commits
- [llvm] ab06a74 - [NFC][SCEV] Reflow `getRelevantLoop()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] d486fdf - [NFC][SCEV] Reflow `getRangeRef()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] 188ec33 - [llvm] Use llvm::bit_width (NFC)
Kazu Hirata via llvm-commits
- [llvm] 6aaac4c - Remove trailing whitespace from comment
Noah Goldstein via llvm-commits
- [PATCH] D142292: [SCEV] Introduce `SCEVSelectExpr`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D142293: [InstCombine] Add PHINode operands to worklist on instruction erasure
Luke Lau via Phabricator via llvm-commits
- [llvm] d10adf6 - [NFC][SCEV] `createNodeForSelectOrPHIInstWithICmpInstCond()`: return optional
Roman Lebedev via llvm-commits
- [llvm] aa12133 - [NFC][SCEV] `createNodeForSelectOrPHIInstWithICmpInstCond()`: directly take `Type`, not `Instruction`
Roman Lebedev via llvm-commits
- [llvm] b0ef5a8 - [NFC][SCEV] `SCEVTraversal::visitAll()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] 1f4f55d - [NFC][SCEV] `CompareSCEVComplexity`: deduplicate handling
Roman Lebedev via llvm-commits
- [PATCH] D140210: [IPSCCP] Enable specialization of functions.
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 40f9bf0 - [OpenMP] Introduce the `ompx_dyn_cgroup_mem(<N>)` clause
Johannes Doerfert via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [llvm] 17c06ce - [OpenMP] Try to fix Flang after new clause was added
Johannes Doerfert via llvm-commits
- [PATCH] D142298: [AVR] Emit 'eicall' for devices with large program memory
Ben Shi via Phabricator via llvm-commits
- [PATCH] D142299: [InstSimplify] Add tests for `icmp eq/ne/ugt/ult X, 0` where `X` is known to be zero; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D142300: [InstSimplify] Simplify `icmp eq/ne/ugt/ult X, 0` -> true/false where `X` is known to be zero.
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 6082420 - Add tests for ctpop(Pow2); NFC
Noah Goldstein via llvm-commits
- [llvm] c9755d8 - Transform ctpop(Pow2) -> icmp ne Pow2, 0
Noah Goldstein via llvm-commits
- [llvm] 82ba958 - [Attributor] Handle constant icmp expressions in AAPotentialValues
Johannes Doerfert via llvm-commits
- [llvm] 7bc88cb - [OpenMP] Simplify `llvm.assume` operands in device code
Johannes Doerfert via llvm-commits
- [llvm] af6c43c - [LoongArch] Allow %pc_lo12 relocs in JIRL's immediate operand position
Weining Lu via llvm-commits
- [llvm] 9cf9687 - [Mips] Use MCInstrInfo::get in MipsAsmParser instead of reinventing it. NFC.
Jay Foad via llvm-commits
- [llvm] b34de68 - [SVE] Add intrinsics for integer binops that explicitly undefine the result for inactive lanes.
Paul Walker via llvm-commits
- [PATCH] D142303: [SVE] Fix invalid INSERT_SUBVECTOR creation when lowering fixed length fp-int conversions.
Paul Walker via Phabricator via llvm-commits
- [lld] e8e0e5f - [NFC] Small indentation fix in lld/ELF/Relocations.cpp
Shivam Gupta via llvm-commits
- [llvm] 902d0e8 - [NFC][X86] Fixup `-mattr=<>` in one runline in `elementwise-store-of-scalar-splat.ll`
Roman Lebedev via llvm-commits
- [llvm] b40532c - [NFC][X86] Fixup typo in `blend-of-shift.ll`
Roman Lebedev via llvm-commits
- [llvm] 96d0c4b - [DAG] mergeInsertEltWithShuffle - pull out mergeEltWithShuffle helper. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 2776cdc - AMDGPU: Add modern copy of fneg combines test
Matt Arsenault via llvm-commits
- [llvm] f42e1e0 - AMDGPU: Copy a source modifier test for f16/v2f16
Matt Arsenault via llvm-commits
- [llvm] 906e995 - [NFC][SCEV] `computeSCEVAtScope()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] cc016e6 - [NFC][SCEV] `getLoopDisposition()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] a81e070 - [NFC][SCEV] `getBlockDisposition()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] c0081c1 - [NFC][SCEV] `getRelevantLoop()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] 418f780 - [NFC][SCEV] Reflow `computeSCEVAtScope()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] 3c560dd - [NFC][SCEVExpander] `CmpSelCost`: use the cost of the expression, not operand
Roman Lebedev via llvm-commits
- [llvm] 8fd6fc7 - [X86] avx-vbroadcastf128.ll - use X86 check prefix instead of X32
Simon Pilgrim via llvm-commits
- [llvm] 6aa43fe - [X86] commute-3dnow.ll - use X86 check prefix instead of X32
Simon Pilgrim via llvm-commits
- [llvm] 92ce50b - [X86] avx2-vbroadcast.ll - use X86 check prefix instead of X32
Simon Pilgrim via llvm-commits
- [PATCH] D106779: [SimplifyCFG] Make ValueEqaulityComparison freeze-aware.
Nikita Popov via Phabricator via llvm-commits
- [llvm] b9a6b4e - [InstSimplify] add tests for poison-safe variants of (X || Y) && Y; NFC
Sanjay Patel via llvm-commits
- [llvm] d178c15 - [InstSimplify] (X || Y) && Y --> Y (for poison-safe logical ops)
Sanjay Patel via llvm-commits
- [PATCH] D142305: [ADT] llvm::bit_cast - use __builtin_bit_cast if available
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 493bab8 - [NFC][SCEV] Reflow `impliesPoison()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [PATCH] D142308: [Polly] Fix a if condition in isl_coalesce.ci
Shivam Gupta via Phabricator via llvm-commits
- [llvm] 556c94e - [DAG] visitINSERT_VECTOR_ELT - use mergeEltWithShuffle to merge inserted vector element chain into base shuffle node
Simon Pilgrim via llvm-commits
- [llvm] 2e8aa2d - [PowerPC] Regenerate vec_absd.ll test checks
Simon Pilgrim via llvm-commits
- [llvm] 9f7b0a3 - [MC][test] Fix a typo
Sergei Barannikov via llvm-commits
- [llvm] 51454e0 - [ADT] Add llvm::byteswap to bit.h
Kazu Hirata via llvm-commits
- [PATCH] D142313: [PowerPC] Replace PPCISD::VABSD(X,Y,0) cases with generic ISD::ABDU(X,Y) node
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] dd8ecde - [ADT] llvm::bit_cast - use __builtin_bit_cast if available
Simon Pilgrim via llvm-commits
- [llvm] 8e4dc4c - [Support] Use functions from bit.h (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D142314: [ORC] Add a NonOwningSymbolStringPtr utility.
Lang Hames via Phabricator via llvm-commits
- [llvm] 898b5c9 - [NFC] Fix "form/from" typos
Mark de Wever via llvm-commits
- [llvm] 31d46ca - [Dominators] Introduce DomTreeNodeTraits to allow customization. (NFC)
Florian Hahn via llvm-commits
- [llvm] a09b5a0 - [NFC][SCEV] Reflow `GetMinTrailingZerosImpl()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] 42aaab3 - [NFC][SCEV] `GetMinTrailingZerosImpl()`: deduplicate handling
Roman Lebedev via llvm-commits
- [llvm] 4f9f0b4 - [NFC][SCEV] Reflow `getRangeRefIter()` into an exhaustive switch
Roman Lebedev via llvm-commits
- [llvm] 0cdf030 - [SCEV] `getRangeRefIter()`: don't forget to recurse into casts
Roman Lebedev via llvm-commits
- [PATCH] D96670: [CMake] Look up target subcomponents in LLVM_AVAILABLE_LIBS
Aaron Puchert via Phabricator via llvm-commits
- [llvm] 0b5cb41 - [CMake] Look up target subcomponents in LLVM_AVAILABLE_LIBS
Aaron Puchert via llvm-commits
- [llvm] caa99a0 - Use llvm::popcount instead of llvm::countPopulation(NFC)
Kazu Hirata via llvm-commits
- [PATCH] D136044: [compiler-rt][builtins] Skip building (b)float16 support on i386-freebsd
Dimitry Andric via Phabricator via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Dimitry Andric via Phabricator via llvm-commits
- [compiler-rt] 45368c7 - [compiler-rt][builtins] Skip building (b)float16 support on i386-freebsd
Dimitry Andric via llvm-commits
- [PATCH] D139685: [DAGCombine]Expand usage of CreateBuildVecShuffle to make full use of vector ops
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] ca7e849 - [llvm] Use llvm::bit_floor (NFC)
Kazu Hirata via llvm-commits
- [llvm] e599094 - [llvm] Use llvm::bit_ceil (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D142317: [Support][LLD] Avoid using uninitialized threadIndex.
Alexey Lapshin via Phabricator via llvm-commits
- [llvm] 32ce06b - [Support] Use llvm::bit_floor in PowerOf2Floor (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D142318: [Support] Add ThreadPoolAllocator class.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D142320: [OpenMP][DeviceRTL][NFC] Use `OMPTgtExecModeFlags` from `llvm/include/llvm/Frontend/OpenMP/OMPDeviceConstants.h`
Shilei Tian via Phabricator via llvm-commits
- [llvm] ea3c249 - [OpenMP][FIX] Properly update ParallelLevels tracker
Johannes Doerfert via llvm-commits
- [llvm] 2275e32 - [OpenMP] Guarding restrictions are required only for guarding
Johannes Doerfert via llvm-commits
- [llvm] 693358d - [OpenMP][DeviceRTL][NFC] Use `OMPTgtExecModeFlags` from `llvm/include/llvm/Frontend/OpenMP/OMPDeviceConstants.h`
Shilei Tian via llvm-commits
- [llvm] e5f746e - [MC] Replace a switch with two 'if's (NFC)
Sergei Barannikov via llvm-commits
- [llvm] 43c1c59 - [OpenMP] Merge barrier elimination into AAExecutionDomain
Johannes Doerfert via llvm-commits
- [PATCH] D140463: [OpenMP] Merge barrier elimination into AAExecutionDomain
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 029f669 - [AVR] Emit 'eicall' for devices with large program memory
Ben Shi via llvm-commits
- [llvm] b47cdc6 - [MC] Replace single-case switch with an if (NFC)
Sergei Barannikov via llvm-commits
- [llvm] 0ee04a1 - ARM: Add baseline test for fneg + fcmp + select combine
Matt Arsenault via llvm-commits
- [PATCH] D142321: [llvm-ml] Disallow '{' and '}' at the start of a statement
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] 7db6a45 - [OpenMP][FIX] Adjust enum size to avoid assertion after D142320
Johannes Doerfert via llvm-commits
- [llvm] 8ab77a7 - [Support] Use llvm::byteswap in SwapByteOrder.h (NFC)
Kazu Hirata via llvm-commits
- [llvm] 88eae6e - [DAGCombine]Expand usage of CreateBuildVecShuffle to make full use of vector ops
Phoebe Wang via llvm-commits
- [llvm] 8e12451 - [OpenMP][FIX] Ensure not to dereference a nullptr
Johannes Doerfert via llvm-commits
- [PATCH] D142323: [Kaleidoscope] Update code snippets in text to match full code listings
Dhruv Chawla via Phabricator via llvm-commits
- [llvm] 0326ee7 - [gn build] Port 7458908f12da
LLVM GN Syncbot via llvm-commits
- [PATCH] D141355: [AMDGPU] Add NewPM support to AMDGPUUnifyDivergentExitNodes pass
Anshil Gandhi via Phabricator via llvm-commits
- [llvm] 129faec - [OpenMP] Identify non-aligned barriers executed in an aligned context
Johannes Doerfert via llvm-commits
- [PATCH] D142325: [ScheduleDAG] Fix removing edges with weak deps
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D142326: [clang][RISCV][test] Add test cases for empty structs and the FP calling conventions
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D142329: [AMDGPU][NFC] Apply new naming convention for feature fmacf64
Mariusz Sikora via Phabricator via llvm-commits
- [llvm] 538cd2e - [Attributor] Multi-range accesses can be exact
Johannes Doerfert via llvm-commits
- [llvm] f341807 - [Attributor] Add initial support for vectors in AAPointerInfo
Johannes Doerfert via llvm-commits
Last message date:
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Archived on: Sun Jan 22 23:57:55 PST 2023
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