[PATCH] D137504: [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

In D137504#3968225 <https://reviews.llvm.org/D137504#3968225>, @amyk wrote:

> @stefanp Thanks for the review and the questions!
>
>> Can we now get rid of CC_PPC64_ELF_FIS completely?
>
> As I mentioned in one of my replies to your other comments, I did try to use this definition instead of the FastISel ones within `PPCFastISel.cpp` and there weren’t any issues.
> It may be possible that we can get rid of `CC_PPC64_ELF_FIS`, although I’m not sure if we should do it within this patch. @nemanjai Do you have any thoughts on this?

I'd rather not change anything in `FastISel` for now. But feel free to add a `TODO` to remove it in the future if it is completely equivalent to the new one (although I am not convinced it is completely equivalent nor that it will remain so as we add functionality to it).


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https://reviews.llvm.org/D137504