[PATCH] D141980: [X86] Transform slow LEA_B_I_D/LEA_SLOWBASE_I -> LEA_IS_D/LEA_IS iff base == index

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 18 22:53:02 PST 2023


pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

I think it is just a general improvement to targets have `TuningSlow3OpsLEA`, despite some arch has limitation the scaled index should not be on the critical path.

> I find it odd that KNL is in that list. KNL is based on Silvermont so I'd expect it to have `TuningSlowLEA` instead.

SOM says `some instructions in the Knights Landing microarchitecture ... will have an allocation throughput of one per cycle. Examples of these instructions are: ... LEA with 3 sources` So I think it is correct to classify to `TuningSlow3OpsLEA`.



================
Comment at: llvm/lib/Target/X86/X86FixupLEAs.cpp:796
+  // (either it has a an Offset or neither base nor index are dst)
+  if (IsScale1 && BaseReg == IndexReg && (hasLEAOffset(Offset) || (IsInefficientBase && !BaseOrIndexIsDst))) {
+    NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(LEAOpcode))
----------------
Out of 80 columns.


================
Comment at: llvm/test/CodeGen/X86/leaFixup32.mir:381
     ; CHECK: RET64 $ebx
     $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg
     RET64 $ebx
----------------
Should we change the function name to reflect the change? The same for others.


Repository:
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