[llvm] e62ffd3 - [RISCV][TableGen] Use getAllDerivedDefinitions in RISCVTargetDefEmitter to simplify the code. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-01-20T00:34:05-08:00
New Revision: e62ffd3fd6bbda04d810f25c2f570e03bda1dd4a

URL: https://github.com/llvm/llvm-project/commit/e62ffd3fd6bbda04d810f25c2f570e03bda1dd4a
DIFF: https://github.com/llvm/llvm-project/commit/e62ffd3fd6bbda04d810f25c2f570e03bda1dd4a.diff

LOG: [RISCV][TableGen] Use getAllDerivedDefinitions in RISCVTargetDefEmitter to simplify the code. NFC

Added: 
    

Modified: 
    llvm/utils/TableGen/RISCVTargetDefEmitter.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
index db38ec89ceeb8..f513bd426a17a 100644
--- a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
@@ -59,31 +59,24 @@ static std::string getEnumFeatures(int XLen) {
 }
 
 void llvm::EmitRISCVTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
-  using MapTy = std::pair<const std::string, std::unique_ptr<llvm::Record>>;
-  using RecordMap = std::map<std::string, std::unique_ptr<Record>, std::less<>>;
-  const RecordMap &Map = RK.getDefs();
-
   OS << "#ifndef PROC\n"
      << "#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)\n"
      << "#endif\n\n";
 
   OS << "PROC(INVALID, {\"invalid\"}, FK_INVALID, {\"\"})\n";
   // Iterate on all definition records.
-  for (const MapTy &Def : Map) {
-    const Record &Rec = *(Def.second);
-    if (Rec.isSubClassOf("RISCVProcessorModel")) {
-      int XLen = getXLen(Rec);
-      std::string MArch = Rec.getValueAsString("DefaultMarch").str();
-
-      // Compute MArch from features if we don't specify it.
-      if (MArch.empty())
-        MArch = getMArch(XLen, Rec);
-
-      OS << "PROC(" << Rec.getName() << ", "
-         << "{\"" << Rec.getValueAsString("Name") << "\"},"
-         << getEnumFeatures(XLen) << ", "
-         << "{\"" << MArch << "\"})\n";
-    }
+  for (const Record *Rec : RK.getAllDerivedDefinitions("RISCVProcessorModel")) {
+    int XLen = getXLen(*Rec);
+    std::string MArch = Rec->getValueAsString("DefaultMarch").str();
+
+    // Compute MArch from features if we don't specify it.
+    if (MArch.empty())
+      MArch = getMArch(XLen, *Rec);
+
+    OS << "PROC(" << Rec->getName() << ", "
+       << "{\"" << Rec->getValueAsString("Name") << "\"},"
+       << getEnumFeatures(XLen) << ", "
+       << "{\"" << MArch << "\"})\n";
   }
   OS << "\n#undef PROC\n";
   OS << "\n";
@@ -91,11 +84,11 @@ void llvm::EmitRISCVTargetDef(const RecordKeeper &RK, raw_ostream &OS) {
      << "#define TUNE_PROC(ENUM, NAME)\n"
      << "#endif\n\n";
   OS << "TUNE_PROC(GENERIC, \"generic\")\n";
-  for (const MapTy &Def : Map) {
-    const Record &Rec = *(Def.second);
-    if (Rec.isSubClassOf("RISCVTuneProcessorModel"))
-      OS << "TUNE_PROC(" << Rec.getName() << ", "
-         << "\"" << Rec.getValueAsString("Name") << "\")\n";
+
+  for (const Record *Rec :
+       RK.getAllDerivedDefinitions("RISCVTuneProcessorModel")) {
+    OS << "TUNE_PROC(" << Rec->getName() << ", "
+       << "\"" << Rec->getValueAsString("Name") << "\")\n";
   }
 
   OS << "\n#undef TUNE_PROC\n";