[PATCH] D141557: [AMDGPU] Further reduce attaching of implicit operands to spills / copies

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:1012
 
+    bool IsFirstSubreg = !Idx;
     bool UseKill = CanKillSuperReg && Idx == SubIndices.size() - 1;
----------------
Probably should write this as Idx == 0


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1527
     const bool IsLastSubReg = i + 1 == e;
-    const bool IsFirstSubReg = i == 0;
+    const bool IsFirstSubReg = !i;
     if (IsLastSubReg) {
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1731
 
-      bool UseKill = SB.IsKill && i == SB.NumSubRegs - 1;
+      bool IsFirstSubreg = !i;
+      bool IsLastSubreg = i == SB.NumSubRegs - 1;
----------------
Ditto


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141557/new/

https://reviews.llvm.org/D141557