[PATCH] D141030: [AMDGPU] Legalize soffset of buffer instruction. Use Waterfall loop logic.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

I think this will mishandle the case where both the SRD and the soffset are VGPRs. You need to handle both at the same time in one waterfall loop (this should show up if your tests used a meaningful SRD). You can also just look into the globalisel tests for these intrinsics, they test all the permutations already



================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5836
+
+  if (Soffset && ScalarOp.isIdenticalTo(*Soffset))
+    emitLoadSoffsetFromVGPRLoop(TII, MRI, MBB, *LoopBB, *BodyBB, DL, ScalarOp);
----------------
Don't understand the isIdenticalTo check, this will miss flag mismatches. Register and subregister equality should be sufficient (maybe it doesn't matter based on context)


================
Comment at: llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll:34
+  ; CHECK-NEXT:   SI_RETURN implicit $vgpr0
+  %val = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> poison, i32 %voffset, i32 %soffset, i32 0)
+  ret float %val
----------------
All of these tests are using poison for the SRD, these should use a meaningful value


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141030/new/

https://reviews.llvm.org/D141030