[llvm] 6ae84d6 - [MC] Use MCRegister instead of unsigned in MCInstPrinter (NFC)
Sergei Barannikov via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 17 11:39:57 PST 2023
Author: Sergei Barannikov
Date: 2023-01-17T22:39:39+03:00
New Revision: 6ae84d668f956a32472a1d93f702007754986a4b
URL: https://github.com/llvm/llvm-project/commit/6ae84d668f956a32472a1d93f702007754986a4b
DIFF: https://github.com/llvm/llvm-project/commit/6ae84d668f956a32472a1d93f702007754986a4b.diff
LOG: [MC] Use MCRegister instead of unsigned in MCInstPrinter (NFC)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140654
Added:
Modified:
llvm/include/llvm/MC/MCInstPrinter.h
llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
llvm/lib/MC/MCInstPrinter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.h
llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp
llvm/lib/Target/VE/VEAsmPrinter.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
llvm/utils/TableGen/AsmWriterEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCInstPrinter.h b/llvm/include/llvm/MC/MCInstPrinter.h
index 93b6a4fb225a4..5e33e274c0b31 100644
--- a/llvm/include/llvm/MC/MCInstPrinter.h
+++ b/llvm/include/llvm/MC/MCInstPrinter.h
@@ -16,13 +16,14 @@ namespace llvm {
class MCAsmInfo;
class MCInst;
-class MCOperand;
-class MCInstrInfo;
class MCInstrAnalysis;
+class MCInstrInfo;
+class MCOperand;
+class MCRegister;
class MCRegisterInfo;
class MCSubtargetInfo;
-class raw_ostream;
class StringRef;
+class raw_ostream;
/// Convert `Bytes' to a hex string and output to `OS'
void dumpBytes(ArrayRef<uint8_t> Bytes, raw_ostream &OS);
@@ -110,7 +111,7 @@ class MCInstPrinter {
StringRef getOpcodeName(unsigned Opcode) const;
/// Print the assembler register name.
- virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
+ virtual void printRegName(raw_ostream &OS, MCRegister Reg) const;
bool getUseMarkup() const { return UseMarkup; }
void setUseMarkup(bool Value) { UseMarkup = Value; }
diff --git a/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h b/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
index 2853b4c5fcb57..054669c9f45ed 100644
--- a/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
+++ b/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
@@ -378,7 +378,7 @@ class MCTargetAsmParser : public MCAsmParserExtension {
return getParser().parsePrimaryExpr(Res, EndLoc, nullptr);
}
- virtual bool parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
+ virtual bool parseRegister(MCRegister &Reg, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
/// tryParseRegister - parse one register if possible
@@ -387,7 +387,7 @@ class MCTargetAsmParser : public MCAsmParserExtension {
/// location, without failing the entire parse if it can't. Must not consume
/// tokens if the parse fails.
virtual OperandMatchResultTy
- tryParseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
+ tryParseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
/// ParseInstruction - Parse one assembly instruction.
///
diff --git a/llvm/lib/MC/MCInstPrinter.cpp b/llvm/lib/MC/MCInstPrinter.cpp
index 843afe3595299..27719c8135ec4 100644
--- a/llvm/lib/MC/MCInstPrinter.cpp
+++ b/llvm/lib/MC/MCInstPrinter.cpp
@@ -43,7 +43,7 @@ StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
return MII.getName(Opcode);
}
-void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void MCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
llvm_unreachable("Target should implement this");
}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
index 8c2345b9da64e..074cde6c0b7e5 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -59,13 +59,17 @@ bool AArch64InstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
return false;
}
-void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo) << markup(">");
+void AArch64InstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg) << markup(">");
}
-void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo,
+void AArch64InstPrinter::printRegName(raw_ostream &OS, MCRegister Reg,
unsigned AltIdx) const {
- OS << markup("<reg:") << getRegisterName(RegNo, AltIdx) << markup(">");
+ OS << markup("<reg:") << getRegisterName(Reg, AltIdx) << markup(">");
+}
+
+StringRef AArch64InstPrinter::getRegName(MCRegister Reg) const {
+ return getRegisterName(Reg);
}
void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
@@ -820,6 +824,10 @@ void AArch64AppleInstPrinter::printInst(const MCInst *MI, uint64_t Address,
AArch64InstPrinter::printInst(MI, Address, Annot, STI, O);
}
+StringRef AArch64AppleInstPrinter::getRegName(MCRegister Reg) const {
+ return getRegisterName(Reg);
+}
+
bool AArch64InstPrinter::printRangePrefetchAlias(const MCInst *MI,
const MCSubtargetInfo &STI,
raw_ostream &O,
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
index 37d0225b45cfe..1baf7e42c35c9 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
@@ -29,8 +29,8 @@ class AArch64InstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
- void printRegName(raw_ostream &OS, unsigned RegNo, unsigned AltIdx) const;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg, unsigned AltIdx) const;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
@@ -43,11 +43,9 @@ class AArch64InstPrinter : public MCInstPrinter {
const MCSubtargetInfo &STI,
raw_ostream &O);
- virtual StringRef getRegName(unsigned RegNo) const {
- return getRegisterName(RegNo);
- }
+ virtual StringRef getRegName(MCRegister Reg) const;
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AArch64::NoRegAltName);
protected:
@@ -257,11 +255,9 @@ class AArch64AppleInstPrinter : public AArch64InstPrinter {
const MCSubtargetInfo &STI,
raw_ostream &O) override;
- StringRef getRegName(unsigned RegNo) const override {
- return getRegisterName(RegNo);
- }
+ StringRef getRegName(MCRegister Reg) const override;
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AArch64::NoRegAltName);
};
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 8125d6195a68f..0aaa2650e1299 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -30,7 +30,7 @@ static cl::opt<bool> Keep16BitSuffixes(
cl::init(false),
cl::ReallyHidden);
-void AMDGPUInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void AMDGPUInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// FIXME: The current implementation of
// AsmParser::parseRegisterOrRegisterNumber in MC implies we either emit this
// as an integer or we provide a name which represents a physical register.
@@ -43,7 +43,7 @@ void AMDGPUInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
// would extend MC to support parsing DWARF register names so we could do
// something like `.cfi_undefined dwarf_wave32_v0`. For now we just live with
// non-pretty DWARF register names in assembly text.
- OS << RegNo;
+ OS << Reg.id();
}
void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
index eeecc0a71fde5..3486cca712ae5 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
@@ -23,13 +23,13 @@ class AMDGPUInstPrinter : public MCInstPrinter {
const MCInstrInfo &MII, const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- //Autogenerated by tblgen
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ // Autogenerated by tblgen
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
static void printRegOperand(unsigned RegNo, raw_ostream &O,
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.h
index 6c88ffd1514b2..afaab31375ce4 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.h
@@ -23,7 +23,7 @@ class R600InstPrinter : public MCInstPrinter {
const MCSubtargetInfo &STI, raw_ostream &O) override;
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
index f34b698e9af23..d76c2810c39f8 100644
--- a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
+++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
@@ -93,8 +93,8 @@ static const char *ARCCondCodeToString(ARCCC::CondCode CC) {
return BadConditionCode(CC);
}
-void ARCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void ARCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
void ARCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
index 6f52e8faca3e9..baf4a6915b706 100644
--- a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
+++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
@@ -28,9 +28,9 @@ class ARCInstPrinter : public MCInstPrinter {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
void printCCOperand(const MCInst *MI, int OpNum, raw_ostream &O);
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 0246ba01ad78f..c240b2462920c 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3895,7 +3895,7 @@ class ARMOperand : public MCParsedAsmOperand {
} // end anonymous namespace.
void ARMOperand::print(raw_ostream &OS) const {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return ARMInstPrinter::getRegisterName(Reg);
else
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
index 15bbc7d503184..d9c5b24ff13d9 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
@@ -85,8 +85,8 @@ bool ARMInstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
return false;
}
-void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo, DefaultAltIdx) << markup(">");
+void ARMInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg, DefaultAltIdx) << markup(">");
}
void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
index aab5e13545c19..494a644cf5454 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
@@ -27,7 +27,7 @@ class ARMInstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
@@ -39,7 +39,7 @@ class ARMInstPrinter : public MCInstPrinter {
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = ARM::NoRegAltName);
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
index 54dad3098385b..89d210bb22e8f 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
@@ -33,7 +33,7 @@ class AVRInstPrinter : public MCInstPrinter {
const MCSubtargetInfo &STI, raw_ostream &O) override;
private:
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = AVR::NoRegAltName);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
index 6f041584a9557..0761681c115bc 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
@@ -14,6 +14,7 @@
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
index e76067ea41aed..ad2dee1a97b88 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
@@ -34,7 +34,7 @@ class BPFInstPrinter : public MCInstPrinter {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
}
diff --git a/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp b/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
index 2515b62f31cf0..01b59d4a509ca 100644
--- a/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
+++ b/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
@@ -430,7 +430,7 @@ struct CSKYOperand : public MCParsedAsmOperand {
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return CSKYInstPrinter::getRegisterName(Reg);
else
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
index 3a0017d11e23b..3e4fdb5e67c34 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
@@ -82,12 +82,12 @@ void CSKYInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printAnnotation(O, Annot);
}
-void CSKYInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
+void CSKYInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
if (PrintBranchImmAsAddress)
- O << getRegisterName(RegNo, ABIRegNames ? CSKY::ABIRegAltName
- : CSKY::NoRegAltName);
+ O << getRegisterName(Reg, ABIRegNames ? CSKY::ABIRegAltName
+ : CSKY::NoRegAltName);
else
- O << getRegisterName(RegNo);
+ O << getRegisterName(Reg);
}
void CSKYInstPrinter::printFPRRegName(raw_ostream &O, unsigned RegNo) const {
@@ -260,9 +260,9 @@ void CSKYInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum,
}
}
-const char *CSKYInstPrinter::getRegisterName(unsigned RegNo) {
- return getRegisterName(RegNo, ArchRegNames ? CSKY::NoRegAltName
- : CSKY::ABIRegAltName);
+const char *CSKYInstPrinter::getRegisterName(MCRegister Reg) {
+ return getRegisterName(Reg, ArchRegNames ? CSKY::NoRegAltName
+ : CSKY::ABIRegAltName);
}
void CSKYInstPrinter::printFPR(const MCInst *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
index 52a1b92767625..461d7f6f12b37 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
@@ -31,7 +31,7 @@ class CSKYInstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier = nullptr);
@@ -64,8 +64,8 @@ class CSKYInstPrinter : public MCInstPrinter {
raw_ostream &O);
void printFPR(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
};
} // namespace llvm
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
index 698dcbd4b8b17..de5c8b86978a8 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
@@ -26,8 +26,8 @@ using namespace llvm;
#define GET_INSTRUCTION_NAME
#include "HexagonGenAsmWriter.inc"
-void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void HexagonInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void HexagonInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
index 76658378c0cd6..38a9081c93fe7 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
@@ -30,9 +30,9 @@ class HexagonInstPrinter : public MCInstPrinter {
void printInst(MCInst const *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
- static char const *getRegisterName(unsigned RegNo);
+ static char const *getRegisterName(MCRegister Reg);
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
index d8a66bc8a0dab..0265a75fb346c 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
@@ -31,8 +31,8 @@ using namespace llvm;
#define PRINT_ALIAS_INSTR
#include "LanaiGenAsmWriter.inc"
-void LanaiInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void LanaiInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
bool LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
index 08cc54b858cee..55a254036fee5 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
@@ -48,8 +48,8 @@ class LanaiInstPrinter : public MCInstPrinter {
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ static const char *getRegisterName(MCRegister Reg);
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
private:
bool printAlias(const MCInst *MI, raw_ostream &Ostream);
diff --git a/llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp b/llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
index 5517ce20479c6..4406808bcc188 100644
--- a/llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
+++ b/llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
@@ -443,7 +443,7 @@ class LoongArchOperand : public MCParsedAsmOperand {
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return LoongArchInstPrinter::getRegisterName(Reg);
else
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
index 3e22f78ec6102..c72af21ade89c 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
@@ -34,8 +34,8 @@ void LoongArchInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printAnnotation(O, Annot);
}
-void LoongArchInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << '$' << getRegisterName(RegNo);
+void LoongArchInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << '$' << getRegisterName(Reg);
}
void LoongArchInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
@@ -65,7 +65,7 @@ void LoongArchInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo,
printRegName(O, MO.getReg());
}
-const char *LoongArchInstPrinter::getRegisterName(unsigned RegNo) {
+const char *LoongArchInstPrinter::getRegisterName(MCRegister Reg) {
// Default print reg alias name
- return getRegisterName(RegNo, LoongArch::RegAliasName);
+ return getRegisterName(Reg, LoongArch::RegAliasName);
}
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
index 137c16406785c..6308a9f4e679e 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
@@ -26,7 +26,7 @@ class LoongArchInstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printAtomicMemOp(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI, raw_ostream &O);
@@ -39,8 +39,8 @@ class LoongArchInstPrinter : public MCInstPrinter {
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
private:
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
diff --git a/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp b/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
index 9ba28622b5b51..97a5af45de022 100644
--- a/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
+++ b/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
@@ -41,8 +41,8 @@ using namespace llvm;
#define PRINT_ALIAS_INSTR
#include "M68kGenAsmWriter.inc"
-void M68kInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << "%" << getRegisterName(RegNo);
+void M68kInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << "%" << getRegisterName(Reg);
}
void M68kInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h b/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
index 239268dd71590..5e104856adb16 100644
--- a/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
+++ b/llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
@@ -28,9 +28,9 @@ class M68kInstPrinter : public MCInstPrinter {
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
index 08c466377ee3d..60849d69e04e5 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
@@ -32,9 +32,9 @@ namespace llvm {
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
-private:
+ private:
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
const char *Modifier = nullptr);
void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
index 5917cd3f95a9d..72590ab81a3e7 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
@@ -71,8 +71,8 @@ const char* Mips::MipsFCCToString(Mips::CondCode CC) {
llvm_unreachable("Impossible condition code!");
}
-void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << '$' << StringRef(getRegisterName(RegNo)).lower()
+void MipsInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << '$' << StringRef(getRegisterName(Reg)).lower()
<< markup(">");
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
index d91612b15a1aa..0652b237509fe 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
@@ -82,9 +82,9 @@ class MipsInstPrinter : public MCInstPrinter {
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
index da0cbb32659cb..0f4a8176429fa 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
@@ -31,16 +31,16 @@ NVPTXInstPrinter::NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
-void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void NVPTXInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// Decode the virtual register
// Must be kept in sync with NVPTXAsmPrinter::encodeVirtualRegister
- unsigned RCId = (RegNo >> 28);
+ unsigned RCId = (Reg.id() >> 28);
switch (RCId) {
default: report_fatal_error("Bad virtual register encoding");
case 0:
// This is actually a physical register, so defer to the autogenerated
// register printer
- OS << getRegisterName(RegNo);
+ OS << getRegisterName(Reg);
return;
case 1:
OS << "%p";
@@ -68,7 +68,7 @@ void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
break;
}
- unsigned VReg = RegNo & 0x0FFFFFFF;
+ unsigned VReg = Reg.id() & 0x0FFFFFFF;
OS << VReg;
}
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
index 503f0497b6f05..49ad3f269229d 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
@@ -24,14 +24,14 @@ class NVPTXInstPrinter : public MCInstPrinter {
NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// End
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index 67c02c17bc460..064d3d6916db8 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -47,8 +47,8 @@ FullRegNamesWithPercent("ppc-reg-with-percent-prefix", cl::Hidden,
#define PRINT_ALIAS_INSTR
#include "PPCGenAsmWriter.inc"
-void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- const char *RegName = getRegisterName(RegNo);
+void PPCInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ const char *RegName = getRegisterName(Reg);
OS << RegName;
}
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
index 8f676da9b466e..db17383df78cd 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
@@ -31,7 +31,7 @@ class PPCInstPrinter : public MCInstPrinter {
const MCRegisterInfo &MRI, Triple T)
: MCInstPrinter(MAI, MII, MRI), TT(T) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
@@ -39,7 +39,7 @@ class PPCInstPrinter : public MCInstPrinter {
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
bool printAliasInstr(const MCInst *MI, uint64_t Address,
const MCSubtargetInfo &STI, raw_ostream &OS);
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index ed6a6d1cda049..05fc17648f462 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -809,7 +809,7 @@ struct RISCVOperand : public MCParsedAsmOperand {
}
void print(raw_ostream &OS) const override {
- auto RegName = [](unsigned Reg) {
+ auto RegName = [](MCRegister Reg) {
if (Reg)
return RISCVInstPrinter::getRegisterName(Reg);
else
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
index 7f88589374dd8..3a6228b0b3918 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
@@ -78,8 +78,8 @@ void RISCVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printAnnotation(O, Annot);
}
-void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void RISCVInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
@@ -194,7 +194,7 @@ void RISCVInstPrinter::printVMaskReg(const MCInst *MI, unsigned OpNo,
O << ".t";
}
-const char *RISCVInstPrinter::getRegisterName(unsigned RegNo) {
- return getRegisterName(RegNo, ArchRegNames ? RISCV::NoRegAltName
- : RISCV::ABIRegAltName);
+const char *RISCVInstPrinter::getRegisterName(MCRegister Reg) {
+ return getRegisterName(Reg, ArchRegNames ? RISCV::NoRegAltName
+ : RISCV::ABIRegAltName);
}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
index 763ce9c95d735..d7d93842e80c8 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
@@ -28,7 +28,7 @@ class RISCVInstPrinter : public MCInstPrinter {
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
raw_ostream &O, const char *Modifier = nullptr);
@@ -56,8 +56,8 @@ class RISCVInstPrinter : public MCInstPrinter {
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
- static const char *getRegisterName(unsigned RegNo, unsigned AltIdx);
+ static const char *getRegisterName(MCRegister Reg);
+ static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);
};
} // namespace llvm
diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
index 744991528297b..424249a09e56a 100644
--- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
+++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.h
@@ -48,7 +48,7 @@ class SPIRVInstPrinter : public MCInstPrinter {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
} // namespace llvm
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
index 3826dfd46c2b4..fb22ddd91ba0e 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
@@ -38,9 +38,8 @@ bool SparcInstPrinter::isV9(const MCSubtargetInfo &STI) const {
return (STI.getFeatureBits()[Sparc::FeatureV9]) != 0;
}
-void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
-{
- OS << '%' << StringRef(getRegisterName(RegNo)).lower();
+void SparcInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << '%' << StringRef(getRegisterName(Reg)).lower();
}
void SparcInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
index 91b78bd03fc38..a9f4a652e0c0d 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
@@ -23,7 +23,7 @@ class SparcInstPrinter : public MCInstPrinter {
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
@@ -39,7 +39,7 @@ class SparcInstPrinter : public MCInstPrinter {
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
unsigned OpIdx, unsigned PrintMethodIdx,
const MCSubtargetInfo &STI, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
raw_ostream &OS);
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
index a322d49adb876..d2dcf200aef04 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
@@ -12,6 +12,7 @@
#include "SparcTargetStreamer.h"
#include "SparcInstPrinter.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/Support/FormattedStream.h"
using namespace llvm;
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index c8961d507c725..034e8759c2f01 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -55,8 +55,8 @@ namespace {
void emitFunctionBodyStart() override;
void emitInstruction(const MachineInstr *MI) override;
- static const char *getRegisterName(unsigned RegNo) {
- return SparcInstPrinter::getRegisterName(RegNo);
+ static const char *getRegisterName(MCRegister Reg) {
+ return SparcInstPrinter::getRegisterName(Reg);
}
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
index 98ed5091a9417..3e0e385b25c49 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
@@ -9,6 +9,7 @@
#include "SystemZInstPrinter.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
@@ -23,8 +24,8 @@ using namespace llvm;
#include "SystemZGenAsmWriter.inc"
-void SystemZInstPrinter::printAddress(const MCAsmInfo *MAI, unsigned Base,
- const MCOperand &DispMO, unsigned Index,
+void SystemZInstPrinter::printAddress(const MCAsmInfo *MAI, MCRegister Base,
+ const MCOperand &DispMO, MCRegister Index,
raw_ostream &O) {
printOperand(DispMO, MAI, O);
if (Base || Index) {
@@ -57,9 +58,9 @@ void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
}
void SystemZInstPrinter::printFormattedRegName(const MCAsmInfo *MAI,
- unsigned RegNo,
+ MCRegister Reg,
raw_ostream &O) const {
- const char *RegName = getRegisterName(RegNo);
+ const char *RegName = getRegisterName(Reg);
if (MAI->getAssemblerDialect() == AD_HLASM) {
// Skip register prefix so that only register number is left
assert(isalpha(RegName[0]) && isdigit(RegName[1]));
@@ -68,6 +69,10 @@ void SystemZInstPrinter::printFormattedRegName(const MCAsmInfo *MAI,
O << markup("<reg:") << '%' << RegName << markup(">");
}
+void SystemZInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ printFormattedRegName(&MAI, Reg, O);
+}
+
void SystemZInstPrinter::printInst(const MCInst *MI, uint64_t Address,
StringRef Annot, const MCSubtargetInfo &STI,
raw_ostream &O) {
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
index 5f12ead105527..6a188ff15039a 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
@@ -30,22 +30,20 @@ class SystemZInstPrinter : public MCInstPrinter {
// Automatically generated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// Print an address with the given base, displacement and index.
- void printAddress(const MCAsmInfo *MAI, unsigned Base,
- const MCOperand &DispMO, unsigned Index, raw_ostream &O);
+ void printAddress(const MCAsmInfo *MAI, MCRegister Base,
+ const MCOperand &DispMO, MCRegister Index, raw_ostream &O);
// Print the given operand.
void printOperand(const MCOperand &MO, const MCAsmInfo *MAI, raw_ostream &O);
- void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
+ void printFormattedRegName(const MCAsmInfo *MAI, MCRegister Reg,
raw_ostream &O) const;
// Override MCInstPrinter.
- inline void printRegName(raw_ostream &O, unsigned RegNo) const override {
- printFormattedRegName(&MAI, RegNo, O);
- }
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
index 1d8c3d514bfbd..8261b5aa7b4e1 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
@@ -27,13 +27,13 @@ using namespace llvm;
#define PRINT_ALIAS_INSTR
#include "VEGenAsmWriter.inc"
-void VEInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
+void VEInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
// Generic registers have identical register name among register classes.
unsigned AltIdx = VE::AsmName;
// Misc registers have each own name, so no use alt-names.
- if (MRI.getRegClass(VE::MISCRegClassID).contains(RegNo))
+ if (MRI.getRegClass(VE::MISCRegClassID).contains(Reg))
AltIdx = VE::NoRegAltName;
- OS << '%' << getRegisterName(RegNo, AltIdx);
+ OS << '%' << getRegisterName(Reg, AltIdx);
}
void VEInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h b/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
index 6995007c6dc68..65660a49c5e4d 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
@@ -24,7 +24,7 @@ class VEInstPrinter : public MCInstPrinter {
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
@@ -34,7 +34,7 @@ class VEInstPrinter : public MCInstPrinter {
const MCSubtargetInfo &, raw_ostream &);
void printInstruction(const MCInst *, uint64_t, const MCSubtargetInfo &,
raw_ostream &);
- static const char *getRegisterName(unsigned RegNo,
+ static const char *getRegisterName(MCRegister Reg,
unsigned AltIdx = VE::NoRegAltName);
void printOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI,
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp b/llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp
index ec911e59b3e67..344cf47f09de8 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp
@@ -12,6 +12,7 @@
#include "VETargetStreamer.h"
#include "VEInstPrinter.h"
+#include "llvm/MC/MCRegister.h"
using namespace llvm;
diff --git a/llvm/lib/Target/VE/VEAsmPrinter.cpp b/llvm/lib/Target/VE/VEAsmPrinter.cpp
index 03c73a7d966bb..bdbc29f984b4c 100644
--- a/llvm/lib/Target/VE/VEAsmPrinter.cpp
+++ b/llvm/lib/Target/VE/VEAsmPrinter.cpp
@@ -57,8 +57,8 @@ class VEAsmPrinter : public AsmPrinter {
void emitInstruction(const MachineInstr *MI) override;
- static const char *getRegisterName(unsigned RegNo) {
- return VEInstPrinter::getRegisterName(RegNo);
+ static const char *getRegisterName(MCRegister Reg) {
+ return VEInstPrinter::getRegisterName(Reg);
}
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &OS);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
index d72bfdbbfb992..ff2fa13d9da52 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
@@ -39,10 +39,10 @@ WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
: MCInstPrinter(MAI, MII, MRI) {}
void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
- unsigned RegNo) const {
- assert(RegNo != WebAssemblyFunctionInfo::UnusedReg);
+ MCRegister Reg) const {
+ assert(Reg.id() != WebAssemblyFunctionInfo::UnusedReg);
// Note that there's an implicit local.get/local.set here!
- OS << "$" << RegNo;
+ OS << "$" << Reg.id();
}
void WebAssemblyInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
index fe104cbca12ea..c81c3a3d9ffaa 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
@@ -35,7 +35,7 @@ class WebAssemblyInstPrinter final : public MCInstPrinter {
WebAssemblyInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
@@ -51,7 +51,7 @@ class WebAssemblyInstPrinter final : public MCInstPrinter {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
};
} // end namespace llvm
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
index 6fd3db4515ecb..5a1c4ec81e1bf 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
@@ -35,8 +35,8 @@ using namespace llvm;
#define PRINT_ALIAS_INSTR
#include "X86GenAsmWriter.inc"
-void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
+void X86ATTInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << '%' << getRegisterName(Reg) << markup(">");
}
void X86ATTInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
index f7a850571260a..83040c112b688 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
@@ -23,7 +23,7 @@ class X86ATTInstPrinter final : public X86InstPrinterCommon {
const MCRegisterInfo &MRI)
: X86InstPrinterCommon(MAI, MII, MRI), HasCustomInstComment(false) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
@@ -38,7 +38,7 @@ class X86ATTInstPrinter final : public X86InstPrinterCommon {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &OS);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override;
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
index c5eb81a79397a..031ba9f87acbb 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
@@ -252,7 +252,7 @@ static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize,
return getVectorRegSize(OpReg) / ScalarSize;
}
-static const char *getRegName(unsigned Reg) {
+static const char *getRegName(MCRegister Reg) {
return X86ATTInstPrinter::getRegisterName(Reg);
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
index d45ec6cc8dfa3..84da39c4a2952 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -33,8 +33,8 @@ using namespace llvm;
#define PRINT_ALIAS_INSTR
#include "X86GenAsmWriter1.inc"
-void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << markup("<reg:") << getRegisterName(RegNo) << markup(">");
+void X86IntelInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << markup("<reg:") << getRegisterName(Reg) << markup(">");
}
void X86IntelInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
index aa4d0545ea468..a34c06782f404 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
@@ -24,7 +24,7 @@ class X86IntelInstPrinter final : public X86InstPrinterCommon {
const MCRegisterInfo &MRI)
: X86InstPrinterCommon(MAI, MII, MRI) {}
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &OS) override;
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
@@ -39,7 +39,7 @@ class X86IntelInstPrinter final : public X86InstPrinterCommon {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override;
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 4d5e3789336ed..b5887b0f9db94 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1903,8 +1903,8 @@ static std::string getShuffleComment(const MachineInstr *MI, unsigned SrcOp1Idx,
// names. Fortunately most people use the ATT style (outside of Windows)
// and they actually agree on register naming here. Ultimately, this is
// a comment, and so its OK if it isn't perfect.
- auto GetRegisterName = [](unsigned RegNum) -> StringRef {
- return X86ATTInstPrinter::getRegisterName(RegNum);
+ auto GetRegisterName = [](MCRegister Reg) -> StringRef {
+ return X86ATTInstPrinter::getRegisterName(Reg);
};
const MachineOperand &DstOp = MI->getOperand(0);
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
index a6296cbdaf905..eda90d3101ab4 100644
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
@@ -14,6 +14,7 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
@@ -26,8 +27,8 @@ using namespace llvm;
#include "XCoreGenAsmWriter.inc"
-void XCoreInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
- OS << StringRef(getRegisterName(RegNo)).lower();
+void XCoreInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
+ OS << StringRef(getRegisterName(Reg)).lower();
}
void XCoreInstPrinter::printInst(const MCInst *MI, uint64_t Address,
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
index a8801fc2c5bc4..916ca99968fbb 100644
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
@@ -29,9 +29,9 @@ class XCoreInstPrinter : public MCInstPrinter {
// Autogenerated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
- void printRegName(raw_ostream &OS, unsigned RegNo) const override;
+ void printRegName(raw_ostream &OS, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
index ed802f762fe7d..fe1dc0e2e483e 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
@@ -16,6 +16,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/raw_ostream.h"
@@ -73,8 +74,8 @@ void XtensaInstPrinter::printInst(const MCInst *MI, uint64_t Address,
printAnnotation(O, Annot);
}
-void XtensaInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
- O << getRegisterName(RegNo);
+void XtensaInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
+ O << getRegisterName(Reg);
}
void XtensaInstPrinter::printOperand(const MCInst *MI, int OpNum,
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
index ebbfda967f26a..46a35ae6f4e3f 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
@@ -30,13 +30,13 @@ class XtensaInstPrinter : public MCInstPrinter {
// Automatically generated by tblgen.
std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
- static const char *getRegisterName(unsigned RegNo);
+ static const char *getRegisterName(MCRegister Reg);
// Print the given operand.
static void printOperand(const MCOperand &MO, raw_ostream &O);
// Override MCInstPrinter.
- void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printRegName(raw_ostream &O, MCRegister Reg) const override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 1541315ba74a4..de4a8b4cbbd75 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -618,10 +618,11 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
"/// for the specified register.\n"
"const char *" << Target.getName() << ClassName << "::";
if (hasAltNames)
- O << "\ngetRegisterName(unsigned RegNo, unsigned AltIdx) {\n";
+ O << "\ngetRegisterName(MCRegister Reg, unsigned AltIdx) {\n";
else
- O << "getRegisterName(unsigned RegNo) {\n";
- O << " assert(RegNo && RegNo < " << (Registers.size()+1)
+ O << "getRegisterName(MCRegister Reg) {\n";
+ O << " unsigned RegNo = Reg.id();\n"
+ << " assert(RegNo && RegNo < " << (Registers.size() + 1)
<< " && \"Invalid register number!\");\n"
<< "\n";
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