[PATCH] D141469: [AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 18 03:30:42 PST 2023


paulwalker-arm added a comment.

In D141469#4060976 <https://reviews.llvm.org/D141469#4060976>, @dewen wrote:

> In D141469#4058457 <https://reviews.llvm.org/D141469#4058457>, @paulwalker-arm wrote:
>
>> Thanks @dewen for the fixes. This looks good to me now. Do you fancy taking a look at fixing the incorrect lowering for the predicate trn, uzp and zip builtins (I suspect we need dedicated intrinsics where the element type is part of the name rather than relying on the operand types) as a separate patch? or would you rather somebody else fix it?
>
> Hi, thank you at paulwalker-arm. I'm interested, but I'm about to start the holiday. Happy New Year.

Ok, I'll bring the fix in house then. Enjoy your holiday.


Repository:
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  https://reviews.llvm.org/D141469/new/

https://reviews.llvm.org/D141469



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