[llvm] c1fc521 - GlobalISel: Split main function of RegBankSelect up
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 20 19:21:23 PST 2023
Author: Matt Arsenault
Date: 2023-01-20T23:21:13-04:00
New Revision: c1fc5219cb23d1e14c0115381321f6d8d6a4fc17
URL: https://github.com/llvm/llvm-project/commit/c1fc5219cb23d1e14c0115381321f6d8d6a4fc17
DIFF: https://github.com/llvm/llvm-project/commit/c1fc5219cb23d1e14c0115381321f6d8d6a4fc17.diff
LOG: GlobalISel: Split main function of RegBankSelect up
This will allow for easier overriding of the pass.
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h b/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
index d0918485249dc..8ca15bdae1dee 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
@@ -407,7 +407,7 @@ class RegBankSelect : public MachineFunctionPass {
}
};
-private:
+protected:
/// Helper class used to represent the cost for mapping an instruction.
/// When mapping an instruction, we may introduce some repairing code.
/// In most cases, the repairing code is local to the instruction,
@@ -639,6 +639,12 @@ class RegBankSelect : public MachineFunctionPass {
.set(MachineFunctionProperties::Property::NoPHIs);
}
+ /// Check that our input is fully legal: we require the function to have the
+ /// Legalized property, so it should be.
+ ///
+ /// FIXME: This should be in the MachineVerifier.
+ bool checkFunctionIsLegal(MachineFunction &MF) const;
+
/// Walk through \p MF and assign a register bank to every virtual register
/// that are still mapped to nothing.
/// The target needs to provide a RegisterBankInfo and in particular
@@ -662,6 +668,8 @@ class RegBankSelect : public MachineFunctionPass {
/// MIRBuilder.buildInstr(COPY, Tmp, ArgReg)
/// inst.getOperand(argument.getOperandNo()).setReg(Tmp)
/// \endcode
+ bool assignRegisterBanks(MachineFunction &MF);
+
bool runOnMachineFunction(MachineFunction &MF) override;
};
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index 4e7af3fb9bd62..bc4fea7dcf23f 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -674,31 +674,7 @@ bool RegBankSelect::assignInstr(MachineInstr &MI) {
return applyMapping(MI, *BestMapping, RepairPts);
}
-bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) {
- // If the ISel pipeline failed, do not bother running that pass.
- if (MF.getProperties().hasProperty(
- MachineFunctionProperties::Property::FailedISel))
- return false;
-
- LLVM_DEBUG(dbgs() << "Assign register banks for: " << MF.getName() << '\n');
- const Function &F = MF.getFunction();
- Mode SaveOptMode = OptMode;
- if (F.hasOptNone())
- OptMode = Mode::Fast;
- init(MF);
-
-#ifndef NDEBUG
- // Check that our input is fully legal: we require the function to have the
- // Legalized property, so it should be.
- // FIXME: This should be in the MachineVerifier.
- if (!DisableGISelLegalityCheck)
- if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
- reportGISelFailure(MF, *TPC, *MORE, "gisel-regbankselect",
- "instruction is not legal", *MI);
- return false;
- }
-#endif
-
+bool RegBankSelect::assignRegisterBanks(MachineFunction &MF) {
// Walk the function and assign register banks to all operands.
// Use a RPOT to make sure all registers are assigned before we choose
// the best mapping of the current instruction.
@@ -735,6 +711,41 @@ bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) {
}
}
+ return true;
+}
+
+bool RegBankSelect::checkFunctionIsLegal(MachineFunction &MF) const {
+ if (!DisableGISelLegalityCheck) {
+ if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
+ reportGISelFailure(MF, *TPC, *MORE, "gisel-regbankselect",
+ "instruction is not legal", *MI);
+ return false;
+ }
+ }
+
+ return true;
+}
+
+bool RegBankSelect::runOnMachineFunction(MachineFunction &MF) {
+ // If the ISel pipeline failed, do not bother running that pass.
+ if (MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::FailedISel))
+ return false;
+
+ LLVM_DEBUG(dbgs() << "Assign register banks for: " << MF.getName() << '\n');
+ const Function &F = MF.getFunction();
+ Mode SaveOptMode = OptMode;
+ if (F.hasOptNone())
+ OptMode = Mode::Fast;
+ init(MF);
+
+#ifndef NDEBUG
+ if (!checkFunctionIsLegal(MF))
+ return false;
+#endif
+
+ assignRegisterBanks(MF);
+
OptMode = SaveOptMode;
return false;
}
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