[PATCH] D141557: [AMDGPU] Further reduce attaching of implicit operands to spills / copies

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes updated this revision to Diff 490004.
jrbyrnes added a comment.

Revert attaching one implicit-def instead of implicit use on each sub reg op where applicable.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141557/new/

https://reviews.llvm.org/D141557

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
  llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
  llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
  llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
  llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
  llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
  llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
  llvm/test/CodeGen/AMDGPU/spill192.mir
  llvm/test/CodeGen/AMDGPU/spill224.mir
  llvm/test/CodeGen/AMDGPU/spill288.mir
  llvm/test/CodeGen/AMDGPU/spill320.mir
  llvm/test/CodeGen/AMDGPU/spill352.mir
  llvm/test/CodeGen/AMDGPU/spill384.mir
  llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
  llvm/test/CodeGen/AMDGPU/vgpr-spill.mir