[PATCH] D141829: [AArch64] fold subs ugt/ult to ands when the second operand is a mask

Sam Tebbs via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 16 05:50:37 PST 2023


samtebbs added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19898
+  SmallVector<SDValue, 8> Ops;
+  for (unsigned i = 0; i != N->getNumOperands(); ++i) {
+    if (i == CCIndex)
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bcl5980 wrote:
> samtebbs wrote:
> > Do you know if CCIndex and CmpIndex always have consistent values? If so it would be cleaner and faster to not use a loop and instead initialise the Ops vector with the correct values in the correct places.
> Based on current code, CCIndex should be always 2, CmpIndex should be always 3. I'm not sure it will change or not in the future. But I can try to use the cleaner way and add a assert here.
That's a good idea, thanks. I think accounting for how things are at the moment and tripping an assertion if it changes is a good approach. 


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Comment at: llvm/test/CodeGen/AArch64/andcompare.ll:2406
+define i32 @cmp_to_ands1(i32 %num) {
+; SDISEL-LABEL: cmp_to_subs1:
+; SDISEL:       // %bb.0:
----------------
Looks like the labels in the check statements are mixed up.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141829/new/

https://reviews.llvm.org/D141829



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