[PATCH] D140208: [AMDGPU] Improved wide multiplies

Thomas Symalla via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 20 10:31:55 PST 2023


tsymalla added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3038
             unsigned j1 = DstIndex - j0;
+            if (Src0KnownZeros[j0] || Src1KnownZeros[j1]) {
+              ++j0;
----------------
Can you add some GISel tests showing the behavior by transforming MIR to MIR? You had an initial test case, you could re-use that. Maybe there are already MIR test cases you could extend. This should also show that Src0 and Src1 are handled correctly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140208/new/

https://reviews.llvm.org/D140208



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