[llvm] 32af267 - [NFC][WebAssembly] Add tests
Samuel Parker via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 18 05:38:10 PST 2023
Author: Samuel Parker
Date: 2023-01-18T13:30:53Z
New Revision: 32af267447490b5cbb6086c1822688e1900c38f0
URL: https://github.com/llvm/llvm-project/commit/32af267447490b5cbb6086c1822688e1900c38f0
DIFF: https://github.com/llvm/llvm-project/commit/32af267447490b5cbb6086c1822688e1900c38f0.diff
LOG: [NFC][WebAssembly] Add tests
Add more variations to fpclamptosat.
Added:
Modified:
llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/WebAssembly/fpclamptosat.ll b/llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
index f8eeb2105e323..f648ca824f65a 100644
--- a/llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
+++ b/llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
@@ -120,6 +120,22 @@ entry:
ret i32 %conv6
}
+define i32 @stest_f16i32_cse(half %x) {
+; CHECK-LABEL: stest_f16i32_cse:
+; CHECK: .functype stest_f16i32_cse (f32) -> (i32)
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i64.trunc_sat_f32_s
+; CHECK-NEXT: i32.wrap_i64
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptosi half %x to i64
+ %conv6 = trunc i64 %conv to i32
+ ret i32 %conv6
+}
+
define i32 @utesth_f16i32(half %x) {
; CHECK-LABEL: utesth_f16i32:
; CHECK: .functype utesth_f16i32 (f32) -> (i32)
@@ -137,6 +153,22 @@ entry:
ret i32 %conv6
}
+define i32 @utesth_f16i32_cse(half %x) {
+; CHECK-LABEL: utesth_f16i32_cse:
+; CHECK: .functype utesth_f16i32_cse (f32) -> (i32)
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i64.trunc_sat_f32_u
+; CHECK-NEXT: i32.wrap_i64
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptoui half %x to i64
+ %conv6 = trunc i64 %conv to i32
+ ret i32 %conv6
+}
+
define i32 @ustest_f16i32(half %x) {
; CHECK-LABEL: ustest_f16i32:
; CHECK: .functype ustest_f16i32 (f32) -> (i32)
@@ -156,6 +188,31 @@ entry:
ret i32 %conv6
}
+define i32 @ustest_f16i32_cse(half %x) {
+; CHECK-LABEL: ustest_f16i32_cse:
+; CHECK: .functype ustest_f16i32_cse (f32) -> (i32)
+; CHECK-NEXT: .local i64
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i64.trunc_sat_f32_s
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: i64.const 0
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i64.const 0
+; CHECK-NEXT: i64.gt_s
+; CHECK-NEXT: i64.select
+; CHECK-NEXT: i32.wrap_i64
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptosi half %x to i64
+ %0 = icmp sgt i64 %conv, 0
+ %spec.store.select7 = select i1 %0, i64 %conv, i64 0
+ %conv6 = trunc i64 %spec.store.select7 to i32
+ ret i32 %conv6
+}
+
; i16 saturate
define i16 @stest_f64i16(double %x) {
@@ -378,6 +435,21 @@ entry:
ret i16 %conv6
}
+define i16 @utesth_f16i16_cse(half %x) {
+; CHECK-LABEL: utesth_f16i16_cse:
+; CHECK: .functype utesth_f16i16_cse (f32) -> (i32)
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i32.trunc_sat_f32_u
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptoui half %x to i32
+ %conv6 = trunc i32 %conv to i16
+ ret i16 %conv6
+}
+
define i16 @ustest_f16i16(half %x) {
; CHECK-LABEL: ustest_f16i16:
; CHECK: .functype ustest_f16i16 (f32) -> (i32)
@@ -410,6 +482,30 @@ entry:
ret i16 %conv6
}
+define i16 @ustest_f16i16_cse(half %x) {
+; CHECK-LABEL: ustest_f16i16_cse:
+; CHECK: .functype ustest_f16i16_cse (f32) -> (i32)
+; CHECK-NEXT: .local i32
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i32.trunc_sat_f32_s
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: i32.const 0
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i32.const 0
+; CHECK-NEXT: i32.gt_s
+; CHECK-NEXT: i32.select
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptosi half %x to i32
+ %0 = icmp sgt i32 %conv, 0
+ %spec.store.select7 = select i1 %0, i32 %conv, i32 0
+ %conv6 = trunc i32 %spec.store.select7 to i16
+ ret i16 %conv6
+}
+
; i64 saturate
define i64 @stest_f64i64(double %x) {
@@ -702,6 +798,36 @@ entry:
ret i64 %conv6
}
+define i64 @utesth_f16i64_cse(half %x) {
+; CHECK-LABEL: utesth_f16i64_cse:
+; CHECK: .functype utesth_f16i64_cse (f32) -> (i64)
+; CHECK-NEXT: .local i32, i64
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: global.get __stack_pointer
+; CHECK-NEXT: i32.const 16
+; CHECK-NEXT: i32.sub
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: global.set __stack_pointer
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: call __fixunssfti
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i64.load 0
+; CHECK-NEXT: local.set 2
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i32.const 16
+; CHECK-NEXT: i32.add
+; CHECK-NEXT: global.set __stack_pointer
+; CHECK-NEXT: local.get 2
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptoui half %x to i128
+ %conv6 = trunc i128 %conv to i64
+ ret i64 %conv6
+}
+
define i64 @ustest_f16i64(half %x) {
; CHECK-LABEL: ustest_f16i64:
; CHECK: .functype ustest_f16i64 (f32) -> (i64)
@@ -906,6 +1032,30 @@ entry:
ret i32 %conv6
}
+define i32 @ustest_f16i32_mm_cse(half %x) {
+; CHECK-LABEL: ustest_f16i32_mm_cse:
+; CHECK: .functype ustest_f16i32_mm_cse (f32) -> (i32)
+; CHECK-NEXT: .local i64
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i64.trunc_sat_f32_s
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: i64.const 0
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i64.const 0
+; CHECK-NEXT: i64.gt_s
+; CHECK-NEXT: i64.select
+; CHECK-NEXT: i32.wrap_i64
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptosi half %x to i64
+ %spec.store.select7 = call i64 @llvm.smax.i64(i64 %conv, i64 0)
+ %conv6 = trunc i64 %spec.store.select7 to i32
+ ret i32 %conv6
+}
+
; i16 saturate
define i16 @stest_f64i16_mm(double %x) {
@@ -1145,6 +1295,29 @@ entry:
ret i16 %conv6
}
+define i16 @ustest_f16i16_mm_cse(half %x) {
+; CHECK-LABEL: ustest_f16i16_mm_cse:
+; CHECK: .functype ustest_f16i16_mm_cse (f32) -> (i32)
+; CHECK-NEXT: .local i32
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: i32.trunc_sat_f32_s
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: i32.const 0
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i32.const 0
+; CHECK-NEXT: i32.gt_s
+; CHECK-NEXT: i32.select
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptosi half %x to i32
+ %spec.store.select7 = call i32 @llvm.smax.i32(i32 %conv, i32 0)
+ %conv6 = trunc i32 %spec.store.select7 to i16
+ ret i16 %conv6
+}
+
; i64 saturate
define i64 @stest_f64i64_mm(double %x) {
@@ -1507,6 +1680,36 @@ entry:
ret i64 %conv6
}
+define i64 @utesth_f16i64_mm_cse(half %x) {
+; CHECK-LABEL: utesth_f16i64_mm_cse:
+; CHECK: .functype utesth_f16i64_mm_cse (f32) -> (i64)
+; CHECK-NEXT: .local i32, i64
+; CHECK-NEXT: # %bb.0: # %entry
+; CHECK-NEXT: global.get __stack_pointer
+; CHECK-NEXT: i32.const 16
+; CHECK-NEXT: i32.sub
+; CHECK-NEXT: local.tee 1
+; CHECK-NEXT: global.set __stack_pointer
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: local.get 0
+; CHECK-NEXT: call __truncsfhf2
+; CHECK-NEXT: call __extendhfsf2
+; CHECK-NEXT: call __fixunssfti
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i64.load 0
+; CHECK-NEXT: local.set 2
+; CHECK-NEXT: local.get 1
+; CHECK-NEXT: i32.const 16
+; CHECK-NEXT: i32.add
+; CHECK-NEXT: global.set __stack_pointer
+; CHECK-NEXT: local.get 2
+; CHECK-NEXT: # fallthrough-return
+entry:
+ %conv = fptoui half %x to i128
+ %conv6 = trunc i128 %conv to i64
+ ret i64 %conv6
+}
+
declare i32 @llvm.smin.i32(i32, i32)
declare i32 @llvm.smax.i32(i32, i32)
declare i32 @llvm.umin.i32(i32, i32)
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