[PATCH] D141962: [RISCV] Use vfirst insead of vcpop for i1 reduce.and/or.

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added a comment.

Is this `early out` really a feasible optimization for a microarchitecture?
All I can think about it is: for mask instruction `vfirst.m`, supposed that there are `n = VLen / DataPath` microinstructions issued (ideally, they are executed parallelly), then if the first `k` microinstructions find the 1, we may write the result of `vfirst.m` back before we get results of the last `n-k` microinstructions. But I don't see too much gains compared to the extra complexity.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D141962/new/

https://reviews.llvm.org/D141962