[PATCH] D141829: [AArch64] fold subs ugt/ult to ands when the second operand is a mask

[NAKAMURA Takumi via Phabricator via llvm-commits]

chapuni added a comment.

It miscompiled CodeGen/TargetLoweringObjectFileImpl.cpp



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19817
+// (X & C) >u Mask --> (X & (C & (~Mask)) != 0
+// (X & C) <u Mask --> (X & (C & (~Mask)) == 0
+static SDValue performSubsToAndsCombine(SDNode *N, SDNode *SubsNode,
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I think the latter is wrong.
eg. X=11 C=7 M=3


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D141829/new/

https://reviews.llvm.org/D141829