[PATCH] D142217: [MC] Store target Insts table in reverse order. NFC.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 20 07:44:27 PST 2023


arsenm added inline comments.


================
Comment at: llvm/include/llvm/MC/MCInstrInfo.h:65
     assert(Opcode < NumOpcodes && "Invalid opcode!");
-    return Desc[Opcode];
+    return Desc[NumOpcodes - 1 - Opcode];
   }
----------------
Can the -1 be avoided?


================
Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:2506-2507
       unsigned NextOpIndex = Inst.getNumOperands();
-      const MCInstrDesc &MCID = ARMInsts[Inst.getOpcode()];
+      const MCInstrDesc &MCID =
+          ARMInsts[ARM::INSTRUCTION_LIST_END - 1 - Inst.getOpcode()];
       int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO);
----------------
Why can't this one use the usual MCInstrInfo::get?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142217/new/

https://reviews.llvm.org/D142217



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