[PATCH] D142089: [AArch64][SME2] Add Multi-vector saturating extract narrow and interleave intrinsics

Kerry McLaughlin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 20 03:04:40 PST 2023


kmclaughlin added a comment.

Hi Carol,
I just spotted one issue with the SVE2p1_Cvt_VG2_Pat class, but otherwise I think this patch looks good!



================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:554
+    : Pat<(out_vt (intrinsic in_vt:$Zn1, in_vt:$Zn2)),
+                  (!cast<Instruction>(name) (REG_SEQUENCE ZPR2, in_vt:$Zn1, zsub0, in_vt:$Zn2, zsub1))>;
+
----------------
I think this should be `ZPR2Mul2`, as the register operand for the multiclass is `ZZ_s_mul_r`?


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