[PATCH] D142025: [AArch64][SME2] Add multi-vector FP convert from Float to interleave Half/BFloat intrinsic

[Caroline via Phabricator via llvm-commits]

CarolineConcatto created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
CarolineConcatto requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Add the following intrinsic:

  FCVTN
  BFCVTN


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D142025

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
  llvm/lib/Target/AArch64/SMEInstrFormats.td
  llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtn.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D142025.490168.patch
Type: text/x-patch
Size: 6040 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230118/6993d9f1/attachment.bin>