[PATCH] D141962: [RISCV] Use vfirst insead of vcpop for i1 reduce.and/or.

[Craig Topper via Phabricator via llvm-commits]

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vfirst has the chance of an early out in a microarchitecture, but
vcpop does not. Though I don't know of such a microarchitecture.

For and/or we only need to know if any 1 exists in the mask (after
invering for AND). So we can use vfirst.

Unfortunately, there is no sgez instruction so we end up needing
to invert an sltz for OR. That might make this not worthwhile if there
isn't a microarchitecture that optimizes vfirst. If the start value
is known to be 0 and the result is used by a branch we will hopefully
end up with a bgez instead.

Posting to collect other opinions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D141962

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll

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